ADP3208CJCPZ-RL データシートの表示（PDF） - ON Semiconductor

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ADP3208CJCPZ-RL

7-Bit, Programmable, Dual-Phase, Mobile, CPU, Synchronous Buck Controller

ON Semiconductor 

ADP3208C

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

EN 1

PWRGD

NC

CLKEN

FBRTN

FB

COMP

NC

IRPM

VARFREQ

VRTT

TTSNS

ADP3208C

(top view)

BST1

DRVH1

SW1

PVCC1

DRVL1

PGND1

PGND2

DRVL2

PVCC2

SW2

DRVH2

BST2

Figure 3. LFCSP Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic

1

EN

2

PWRGD

3

NC

4

CLKEN

5

FBRTN

6

FB

7

COMP

8

NC

9

IRPM

10

VARFREQ

11

VRTT

12

TTSNS

13

IMON

14

RPM

15

IREF

Description

Enable Input. Driving this pin low shuts down the chip, disables the driver outputs, pulls PWRGD

and VRTT low, and pulls CLKEN high.

Power-Good Output. Open-drain output. A low logic state means that the output voltage is outside

of the VID DAC defined range.

Not Connected.

Clock Enable Output. Open-drain output. A low logic state enables the CPU internal PLL clock to

lock to the external clock.

Feedback Return Input/Output. This pin remotely senses the CPU core voltage. It is also used as the

ground return for the VID DAC and the voltage error amplifier blocks.

Voltage Error Amplifier Feedback Input. The inverting input of the voltage error amplifier.

Voltage Error Amplifier Output and Frequency Compensation Point.

Not Connected.

RPM Mode Timing Control Input. A resistor between this pin or RPM pin to ground sets the RPM mode

turn-on threshold voltage. If a resistor is connected between this pin to ground, RPM pin must remain

floating.

Variable Frequency Enable Input. A high logic state enables the PWM clock frequency to vary with

VID code.

Voltage Regulator Thermal Throttling Output. Logic high state indicates that the voltage regulator

temperature at the remote sensing point exceeded a set alarm threshold level.

Thermal Throttling Sense and Crowbar Disable Input. A resistor divider where the upper resistor is

connected to VCC, the lower resistor (NTC thermistor) is connected to GND, and the center point is

connected to this pin and acts as a temperature sensor half bridge. Connecting TTSNS to GND disables

the thermal throttling function and disables the crowbar, or overvoltage protection (OVP), feature

of the chip.

Current Monitor Output. This pin sources a current proportional to the output load current. A

resistor to FBRTN sets the current monitor gain.

RPM Mode Timing Control Input. A resistor between this pin or IRPM pin to ground sets the RPM mode

turn-on threshold voltage. If a resistor is connected between this pin to ground, IRPM pin must remain

floating.

This pin sets the internal bias currents. A 80kOhm resistor is connected from this pin to ground.

Rev. 1 | Page 11 of 41 | www.onsemi.com

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