MT28S4M16LCTG-10 データシートの表示（PDF） - Micron Technology

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MT28S4M16LCTG-10

SYNCFLASH® MEMORY

Micron Technology 

A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Bus

11 10 9 8 7 6 5 4 3 2 1 0

Reserved* WB Op Mode CAS Latency BT Burst Length

Mode Register (Mx)

*Program

M11, M10 = 0, 0

to ensure compatibility

with future devices.

M2 M1 M0

000

001

010

011

100

101

110

111

Burst Length

M3 = 0

1

2

4

8

Reserved

Reserved

Reserved

Full Page

M3 = 1

1

2

4

8

Reserved

Reserved

Reserved

Reserved

M3

Burst Type

0

Sequential

1

Interleaved

M6 M5 M4

00 0

00 1

01 0

01 1

10 0

10 1

11 0

11 1

CAS Latency

Reserved

1

2

3

Reserved

Reserved

Reserved

Reserved

M8

M7

M6-M0 Operating Mode

0

0

Defined Standard Operation

-

-

-

All other states reserved

M9

Write Burst Mode

0

Reserved

1

Single Location Access

Figure 1

Mode Register Definition

4 MEG x 16

SYNCFLASH MEMORY

Table 1

Burst Definition

Burst

Length

2

4

8

Full

Page

256

StartingColumn OrderofAccessesWithinaBurst

Address Type=Sequential Type=Interleaved

A0

0

0-1

0-1

1

1-0

1-0

A1 A0

00

0-1-2-3

0-1-2-3

01

1-2-3-0

1-0-3-2

10

11

2-3-0-1

3-0-1-2

2-3-0-1

3-2-1-0

A2 A1 A0

000

001

0-1-2-3-4-5-6-7

1-2-3-4-5-6-7-0

0-1-2-3-4-5-6-7

1-0-3-2-5-4-7-6

0 1 0 2-3-4-5-6-7-0-1 2-3-0-1-6-7-4-5

011

100

3-4-5-6-7-0-1-2

4-5-6-7-0-1-2-3

3-2-1-0-7-6-5-4

4-5-6-7-0-1-2-3

1 0 1 5-6-7-0-1-2-3-4 5-4-7-6-1-0-3-2

110

111

6-7-0-1-2-3-4-5

7-0-1-2-3-4-5-6

6-7-4-5-2-3-0-1

7-6-5-4-3-2-1-0

n = A0–A7

Cn, Cn+1, Cn+2

Cn+3, Cn+4...

Not supported

(location 0-255) …Cn-1,

Cn...

NOTE:

1. For a burst length of two, A1–A7 select the block-

of-two burst; A0 selects the starting column

within the block.

2. For a burst length of four, A2–A7 select the block-

of-four burst; A0–A1 select the starting column

within the block.

3. For a burst length of eight, A3–A7 select the

block-of-eight burst; A0–A2 select the starting

column within the block.

4. For a full-page burst, the full row is selected and

A0–A7 select the starting column.

5. Whenever a boundary of the block is reached

within a given sequence above, the following

access wraps within the block.

6. For a burst length of one, A0–A7 select the unique

column to be accessed, and mode register bit M3

is ignored.

4 Meg x 16 SyncFlash

MT28S4M16LC_6.p65 – Rev. 6, Pub. 9/01

8

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2001, Micron Technology, Inc.

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