56F801 データシートの表示（PDF） - Motorola => Freescale
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56F801 Datasheet PDF : 44 Pages
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Freescale Semiconductor, Inc.
160
120
IDD Digital IDD Analog IDD Total
80
40
0
10
20
30
40
50
60
70
80
Freq. (MHz)
Figure 3. Maximum Run IDD vs. Frequency (see Note 7. in Table 17)
3.3 AC Electrical Characteristics
Timing waveforms in Section 3.3 are tested using the VIL and VIH levels specified in the DC Characteristics
table. In Figure 4 the levels of VIH and VIL for an input signal are shown.
VIH
Low
Input Signal
Midpoint1
Fall Time
VIL
High
Rise Time
90%
50%
10%
Note: The midpoint is VIL + (VIH – VIL)/2.
Figure 4. Input Signal Measurement References
Figure 5 shows the definitions of the following signal states:
• Active state, when a bus or signal is driven, and enters a low impedance state.
• Tri-stated, when a bus or signal is placed in a high impedance state.
• Data Valid state, when a signal level has reached VOL or VOH.
• Data Invalid state, when a signal level is in transition between VOL and VOH.
16
56F801 Technical Data
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