AD9937 データシートの表示（PDF） - Analog Devices
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AD9937 Datasheet PDF : 44 Pages
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AD9937
VDLEN
11-BIT
000
001
002
003
VD COUNTER
N–1
N 2048
000
001
12-BIT
HD COUNTER
HDLENx*
VD 1
2
3
HDLASTLEN
HD 4 5 6 7
OPTIONAL SECOND HD PULSE PER LINE
*X = 0, 1, 2, 3, 4 REPRESENTING CCD REGIONS
PROGRAMMABLE CLOCK POSITIONS
1. VDHD_INVERT (PROGRAMMABLE AT CONTROL 0x04)
2. VDTOG1 (PROGRAMMABLE AT MODE_REG(4))
3. VDTOG2 (PROGRAMMABLE AT MODE_REG(4))
4. HDTOG1 (PROGRAMMABLE AT MODE_REG(2))
5. HDTOG2 (PROGRAMMABLE AT MODE_REG(2))
6. HDTOG3 (PROGRAMMABLE AT MODE_REG(3))
7. HDTOG4 (PROGRAMMABLE AT MODE_REG(3))
Figure 17. VD and HD Programmable Locations
11-BIT
VD COUNTER
VD
HMASK
H1(A–D)
1
2
3
H1(A–D)
H1(A, B)
PROGRAMMABLE CLOCK POSITIONS
1. HMASKSTART (PROGRAMMABLE AT MODE_REG(12))
2. HMASKSTOP (PROGRAMMABLE AT MODE_REG(12))
3. H1MASKPOL (PROGRAMMABLE AT MODE_REG(12))
THE POLARITY OF H1(A–D) DURING BLANKING IS PROGRAMMABLE
(H2(A, B) IS ALWAYS THE OPPOSITE POLARITY OF H1 (A–D))
Figure 18. Programmable Clock Positions for HMASK
Register Name
PBLK_LEVEL
PBLKTOG1
PBLKTOG2
PBLKTOG3
PBLKTOG4
PBLKSTART
PBLKSTOP
Length
(Bits)
1
12
12
12
12
11
11
Register
Type
Control 0x03
Mode_Reg(9)
Mode_Reg(9)
Mode_Reg(10)
Mode_Reg(10)
Mode_Reg(11)
Mode_Reg(11)
Table XI. PBLK Registers
Range
HIGH/LOW
0–4095 Pixel Locations
0–4095 Pixel Locations
0–4095 Pixel Locations
0–4095 Pixel Locations
0–2047 Line Number
0–2047 Line Number
–26–
Description
0 = Blank Output Data to Zero,
1 = Blank Output Data to REFBLACK
Sets PBLK Toggle Position 1 within the Line
Sets PBLK Toggle Position 2 within the Line
Sets PBLK Toggle Position 3 within the Line
Sets PBLK Toggle Position 4 within the Line
Sets the Line Number the PBLK Pulse Will Start In
Sets the Line Number the PBLK Pulse Will Stop In
REV. 0
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