ADM1029ARQZ-R7(2012) データシートの表示（PDF） - ON Semiconductor

部品番号

コンポーネント説明

メーカー

ADM1029ARQZ-R7
(Rev.:2012)

Dual PWM Fan Controller and Temperature Monitor for High Availability Systems

ON Semiconductor 

ADM1029

write to the slave device. If the R/W bit is a 1 the

master will read from the slave device.

2. Data is sent over the serial bus in sequences of

nine clock pulses, eight bits of data followed by an

acknowledge bit from the slave device. Transitions

on the data line must occur during the low period

of the clock signal and remain stable during the

high period, as a low-to-high transition when the

clock is high may be interpreted as a STOP signal.

The number of data bytes that can be transmitted

over the serial bus in a single READ or WRITE

operation is limited only by what the master and

slave devices can handle.

3. When all data bytes have been read or written,

stop conditions are established. In WRITE mode,

the master will pull the data line high during the

tenth clock pulse to assert a STOP condition. In

READ mode, the master device will override the

acknowledge bit by pulling the data line high

during the low period before the ninth clock pulse.

This is known as No Acknowledge. The master

will then take the data line low during the low

period before the tenth clock pulse, high during the

tenth clock pulse to assert a STOP condition.

Any number of bytes of data may be transferred over the

serial bus in one operation, but it is not possible to mix read

and write in one operation, because the type of operation is

determined at the beginning and cannot subsequently be

changed without starting a new operation.

1

9

1

9

SCL

SDA

0

START BY

MASTER

1

0

1

A2 A1 A0

FRAME 1

SERIAL BUS ADDRESS BYTE

SCL (CONTINUED)

R/W

D7

ACK. BY

ADM1029

1

D6 D5 D4 D3 D2 D1 D0

FRAME 2

ADDRESS POINTER REGISTER BYTE

9

ACK. BY

ADM1029

SDA (CONTINUED)

D7 D6 D5 D4 D3 D2 D1 D0

FRAME 3

DATA BYTE

ACK. BY STOP BY

ADM1029 MASTER

Figure 18. Writing a Register Address to the Address Pointer Register,

then Writing Data to the Selected Register

1

9

1

9

SCL

SDA

0

START BY

MASTER

1

0

1

A2 A1 A0

FRAME 1

SERIAL BUS ADDRESS BYTE

R/W

D7

ACK. BY

ADM1029

D6 D5 D4 D3 D2 D1 D0

FRAME 2

ADDRESS POINTER REGISTER BYTE

ACK. BY

ADM1029

STOP BY

MASTER

Figure 19. Writing to the Address Pointer Register Only

1

9

1

9

SCL

SDA

0

START BY

MASTER

1

0

1 A2 A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0

FRAME 1

SERIAL BUS ADDRESS BYTE

ACK. BY

ADM1029

FRAME 2

DATA BYTE FROM ADM1029

NO ACK. STOP BY

BY MASTER MASTER

Figure 20. Reading Data from a Previously Selected Register

http://onsemi.com

9

Share Link: