ATA6628 データシートの表示（PDF） - Atmel Corporation

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ATA6628

LIN Bus Transceiver with 3.3V (5V) Regulator and Watchdog

Atmel Corporation 

9. Electrical Characteristics (Continued)

5V < VS < 27V, –40°C < Tj < 150°C, unless otherwise specified. All values refer to GND pins

No. Parameters

Test Conditions

Pin

Symbol Min. Typ. Max.

8 LIN Bus Driver

8.1

Driver recessive output

voltage

Load1/Load2

LIN

VBUSrec 0.9 × VS

VS

8.2 Driver dominant voltage

8.3 Driver dominant voltage

8.4 Driver dominant voltage

8.5 Driver dominant voltage

8.6 Pull-up resistor to VS

VVS = 7V

Rload = 500Ω

VVS = 18V

Rload = 500Ω

VVS = 7.0V

Rload = 1000Ω

VVS = 18V

Rload = 1000Ω

The serial diode is

mandatory

LIN

V_LoSUP

1.2

LIN

V_HiSUP

2

LIN

V_LoSUP_1k

0.6

LIN

V_HiSUP_1k

0.8

LIN

RLIN

20

30

47

8.7

Voltage drop at the serial

diodes

In pull-up path with Rslave

ISerDiode = 10mA

8.8

LIN current limitation

VBUS = VBatt_max

8.9

Input leakage current at the

receiver including pull-up

resistor as specified

Input leakage current

Driver off

VBUS = 0V

VBatt = 12V

Driver off

8.10

Leakage current LIN

recessive

8V < VBatt < 18V

8V < VBUS < 18V

VBUS ≥ VBatt

Leakage current at GND

8.11

loss, control unit

disconnected from ground.

Loss of local ground must

not affect communication in

GNDDevice = VS

VBatt = 12V

0V < VBUS < 18V

the residual network.

LIN

VSerDiode

0.4

1.0

LIN

IBUS_LIM

70

120

200

LIN

IBUS_PAS_do

–1

m

–0.35

LIN

IBUS_PAS_rec

10

20

LIN

IBUS_NO_gnd –10

+0.5

+10

Leakage current at loss of

8.12

battery. Node has to sustain

the current that can flow

under this condition. Bus

must remain operational

VBatt disconnected

VSUP_Device = GND

0V < VBUS < 18V

under this condition.

LIN

IBUS_NO_bat

0.1

2

8.13

Capacitance on pin LIN to

GND

LIN

CLIN

20

9 LIN Bus Receiver

9.1

Center of receiver threshold

VBUS_CNT =

(Vth_dom + Vth_rec)/2

LIN

VBUS_CNT

0.475 ×

VS

0.5 ×

VS

0.525 ×

VS

9.2 Receiver dominant state VEN = VCC

LIN

VBUSdom

0.4 × VS

9.3 Receiver recessive state VEN = VCC

LIN

VBUSrec 0.6 × VS

9.4 Receiver input hysteresis Vhys = Vth_rec – Vth_dom

LIN

VBUShys

0.028 ×

VS

0.1 × VS

0.175 ×

VS

*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter

Unit

V

V

V

V

V

kΩ

V

mA

mA

µA

µA

µA

pF

V

V

V

V

Type*

A

A

A

A

A

A

D

A

A

A

A

A

D

A

A

A

A

24 ATA6628/ATA6630 [DATASHEET]

9117I–AUTO–10/14

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