ATF1516SE-10 データシートの表示（PDF） - Atmel Corporation
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ATF1516SE-10 Datasheet PDF : 69 Pages
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General
Description
Beginning with the introduction of the 100% connected ATF1500 with 32 enhanced macrocells
in 1996, Atmel’s CPLD products have delivered extra IO connectivity and logic reusability.
Atmel’s commitment to efficient, flexible architecture has continued with the current Atmel
ATF15xxSE Family of industry-standard, pin-compatible CPLDs. Atmel’s Logic Doubling
architecture consists of wider fan-in, additional routing and clock options, combined with
sophisticated, proprietary device fitters, extend CPLD place and route efficiency. Atmel
enhanced macrocell includes double independent buried feedback that allows designers to
pack more logic (particularly shifters and latches) into a smaller CPLD or leave spare room for
later revisions. The Atmel ATF15xxSE family delivers enhanced functionality and flexibility
with no additional design effort and is highly cost effective.
The Atmel ATF15xxSE Family includes all popular configurations and speeds.
Table 1. ATF15xxSE Family Device Features
Feature
ATF1502SE(L) ATF1504SE(L)
Usable Gates
750
1500
Macrocells
32
64
Logic Blocks
2
4
Max. # Pins
44
100
Max. User I/Os
36
68
TPD Grades (ns)
5, 6, 7, 10(15)
5, 6, 7, 10(15)
ATF1508SE(L)
3000
128
8
256
100
6, 7, 10(15)
ATF1516SE(L)
6000
256
16
256
164
7, 10(15)
The Atmel ATF15xxSE Family includes pin-compatible products in all popular packages.
Table 2. ATF15xxSE Family Device Packages and Number of Signal Pins(1)(2)
Packages
ATF1502SE(L) ATF1504SE(L) ATF1508SE(L) ATF1516SE(L)
44-pin PLCC
36
36
44-pin TQFP
36
36
84-pin PLCC
68
68
100-pin TQFP
68
84
100-pin PQFP
84
160-pin PQFP
100
208-pin PQFP
164
208-pin RQFP
164
Notes: 1. Contact Atmel for up-to-date information on device and package availability.
2. When the JTAG port is used for In System Programming (ISP) or Boundary-scan Testing
(BST), the four associated pins become JTAG pins and are unavailable for user I/O.
2 ATF15xxSE Family
2401D–PLD–09/02
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