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LB1921 データシートの表示(PDF) - SANYO -> Panasonic

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LB1921 Datasheet PDF : 10 Pages
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LB1921
8. External Interface Pins
• LD pin
Output type:
Open collector
Breakdown voltage: Maximum supply voltage of 30 V
Saturation voltage sample-to-sample variation (reference value) (ILD = 10 mA)
0.10 to 0.15 V
• FGS pin
Output type:
Open collector
Breakdown voltage: Maximum supply voltage of 30 V
Saturation voltage sample-to-sample variation (reference value) (IFGS = 2 mA)
0.12 to 0.18 V
The FGS pin outputs the FGS amplifier output converted to a pulse output by a hysteresis comparator for use in
speed monitoring. The pull-up resistor is not required when this pin is not used.
• Start/stop pin
Input type:
PNP transistor base with a 50-kpull-down resistor to ground.
Threshold level (typical): about 2.6 V
In stop mode, the 4-V, 5-V, and 7-V fixed voltage power supplies are turned off.
• F/R pin
Input type:
PNP transistor base with a 50-kpull-down resistor to ground.
Threshold level (typical): about 2.2 V (high to low), about 2.7 V (low to high)
Hysteresis:
about 0.5 V
F/R switching must be done when stopped.
9. Fixed Voltage Power Supply Temperature Characteristics
• 4-V power supply: about –0.5 mV/°C (typical)
• 5-V power supply: about –0.6 mV/°C (typical)
• 7-V power supply: about –2.5 mV/°C (typical)
10. FG Amplifier
The resistors R1 and R2 set the FG amplifier gain, with the gain being determined by the formula G = R2/R1. The
capacitors C4 and C5 determine the FG amplifier frequency characteristics, with R1 and C4 forming a high-pass filter
and R2 and C5 forming a low-pass filter. Since the FG amplifier is followed by a Schmitt comparator, the values of
R1, R2, C4 and C5 must be set up so that FG amplifier output is over 250 mVp-p. In particular, it is desirable that the
FG amplifier output be set up to be between 1 and 3 V during steady-state rotation.
11. External Capacitors
• C3
The capacitor C3 is required for FGIN+ pin fixed voltage power supply stabilization and IC internal logic initial
reset pulse generation. Although the value of this capacitor can be quite small for power supply stabilization, a
relatively large capacitance (about 4.7 µF) is required for reset pulse generation. The reset pulse is generated during
the time the FGIN+ pin goes from 0 to about 1.3 V. If the reset does not operate, LD will turn on briefly at startup.
If this phenomenon is not a problem, a capacitor of about 0.1 µF can be used for C3. After C3 is charged to 4 V,
when VCC is turned off (or the motor is stopped), the charge on C3 is discharged through the IC internal resistance
to ground, which is about 10 k.
• C1 and C2
The capacitors C1 and C2 are required for fixed voltage power supply stabilization. Since this IC adopts a direct
PWM drive scheme and switches large currents in the output, noise can occur easily. Thus the power supply must
be adequately stabilized so that this noise does not cause the IC to operate incorrectly. C1, C2 and C3 must be
connected as close as possible to GND1. In particular, C1’s characteristics are easily influenced and thus require
caution.
No. 5439-8/10

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