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MBRS340 データシートの表示(PDF) - Linear Technology

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MBRS340 Datasheet PDF : 24 Pages
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LT3975
APPLICATIONS INFORMATION
light loads, the part will go to sleep between groups of
pulses, so the quiescent current of the part will still be low,
but not as low as in Burst Mode operation. The quiescent
current in a typical application when synchronized with an
external clock is 11µA at no load. Holding the SYNC pin
DC high yields no advantages in terms of output ripple or
minimum load to full frequency, so is not recommended.
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
R1=
R2

VOUT
1.197V
1
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
The total resistance of the FB resistor divider should be
selected to be as large as possible to enhance low current
performance. The resistor divider generates a small load
on the output, which should be minimized to optimize the
low supply current at light loads.
When using large FB resistors, a 10pF phase lead capacitor
should be connected from VOUT to FB.
Setting the Switching Frequency
The LT3975 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2MHz
by using a resistor tied from the RT pin to ground. A table
showing the necessary RT value for a desired switching
frequency is in Table 1.
To estimate the necessary RT value for a desired switching
frequency, use the equation:
( ) RT =
51.1
fSW 1.09
– 9.27
where RT is in kΩ and fSW is in MHz.
Table 1. Switching Frequency vs RT Value
SWITCHING FREQUENCY (MHz)
RT VALUE (kΩ)
0.2
294
0.3
182
0.4
130
0.6
78.7
0.8
54.9
1.0
41.2
1.2
32.4
1.4
26.1
1.6
21.5
1.8
17.8
2.0
14.7
2.2
12.4
Operating Frequency Trade-Offs
Selection of the operating frequency is a trade-off between
efficiency, component size, minimum dropout voltage, and
maximum input voltage. The advantage of high frequency
operation is that smaller inductor and capacitor values
may be used. The disadvantages are lower efficiency, and
lower maximum input voltage. The highest acceptable
switching frequency (fSW(MAX)) for a given application
can be calculated as follows:
( ) fSW(MAX)
=
VOUT
tON(MIN) VIN
+
VD
VSW
+
VD
where VIN is the typical input voltage, VOUT is the output
voltage, VD is the catch diode drop (~0.5V), and VSW is
the internal switch drop (~0.22V at max load). This equa-
tion shows that slower switching frequency is necessary
to safely accommodate high VIN/VOUT ratio. This is due
to the limitation on the LT3975’s minimum on-time. The
minimum on-time is a strong function of temperature.
Use the typical minimum on-time curve to design for an
application’s maximum temperature, while adding about
30% for part-to-part variation. The minimum duty cycle that
can be achieved taking minimum on time into account is:
DCMIN = fSW • tON(MIN)
where fSW is the switching frequency, the tON(MIN) is the
minimum switch on-time.
3975f
12

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