MAX121C データシートの表示（PDF） - Maxim Integrated

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MAX121C

308ksps ADC with DSP Interface and 78dB SINAD

Maxim Integrated 

MAX121

EVALUATION KIT AVAILABLE

308ksps ADC with DSP Interface and 78dB SINAD

General Description

The MAX121 is a complete, BiCMOS, serial-output,

sampling 14-bit analog-to-digital converter (ADC) that

com­bines an on-chip track/hold and a low-drift, low-

noise, buried-zener voltage reference with fast conversion

speed and low power consumption. The throughput rate

is as high as 308k samples per second (ksps). The full-

scale analog input range is ±5V.

The MAX121 utilizes the successive-approximation archi-

tecture with a high-speed DAC to achieve both fast

conversion speeds and low-power operation. Operating

with +5V and -12V or -15V power supplies, power con­

sumption is only 210mW.

The MAX121 can be directly interfaced to the serial port

of most popular digital-signal processors, and comes

in space-saving 16-pin DIP and SO and smaller 20-pin

SSOP packages. The MAX121 operates with TTL- and

CMOS-compatible clocks in the frequency range from

1.1MHz to 5.5MHz. All logic inputs and outputs are TTL-­

and CMOS-compatible. This data sheet includes applica-

tion notes for easy interface to TMS320, µPD77230, and

ADSP2101 digital-signal processors, as well as µPs using

the Motorola SPI and QSPI interface standards.

Applications

●● Digital Signal Processing

●● Audio and Telecom Processing

●● Speech Recognition and Synthesis

●● DSP Servo Control

●● Spectrum Analysis

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part, refer

to www.maximintegrated.com/MAX121.related.

Benefits and Features

●● 14-Bit Resolution

●● 2.9µs Conversion Time/308ksps Throughput

●● 400ns Acquisition Time

●● Low Noise and Distortion

• 78d8 SINAD

• -85dB THD

●● ±5V Bipolar Input Range, Overvoltage Tolerant to

±15V

●● 210mW Power Dissipation

●● Continuous-Conversion Mode Available

●● 30ppm/°C, -5V Internal Reference

●● Interfaces to DSP Processors

●● 16-Pin DIP and SO Packages,

20-Pin SSOP Package

Functional Diagram

AIN

3kΩ

MAX121

BUFFER

SAMPLING

COMPARATOR

TRACK/HOLD

7pF

VREF

3kΩ

-5V

DAC

VDD

AGND

DGND

VSS

SAR

REFERENCE

CLIKIN

CONVST

CONTROL LOGIC

CS

MODE

INVCLK

INVFRM

SDATA

SCLK

FSTRT

SFRM

19-0108; Rev 3; 1/12

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