CS61581(2005) データシートの表示（PDF） - Cirrus Logic

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CS61581
(Rev.:2005)

T1/E1 Universal Line Interface

Cirrus Logic 

CS61581

2.14 Control Register 1 SH (CR2.0 = 1): Address 0x10

7 (MSB)

TAOS

6

LLOOP

5

RLOOP

4

LEN2

3

LEN1

2

LEN0

1

RSVD

0 (LSB)

LOS

TAOS

LLOOP

RLOOP

LEN [2:0]

RSVD

LOS

Transmit All Ones Select

When TAOS = 1, all ones are transmitted at the TCLK frequency

Local Loopback

When LLOOP = 1, data input at TPOS/TNEG (TDATA) is internally looped back and output on

RPOS/RNEG (RDATA). TCLK is routed to RCLK, through the jitter attenuator, if activated.

Remote Loopback

When RLOOP = 1, clock and data recovered by the receiver are sent back through the transmit

path and retransmitted. The clock and data are routed through the jitter attenuator, if activated.

Line Length Selection

Allows selection of a variety of transmit pulse shapes.

See Table 1 for details.

Note that the selection of T1 or E1 pulse shapes determines the operation of the device. When

MATCHZ is set to “1” the transmitter’s output impedance changes according to the pulse se-

lected. For T1 pulses, the encoders and decoders are set to B8ZS, and the QRSS data pattern

is 220-1 with 14 consecutive zeros, max. For E1 pulses, the encoders and decoders are set to

HDB3, and the QRSS data pattern is 215-1.

This bit is reserved.

Loss Of Signal

LOS = 1 when the loss of signal criteria have been met (175 zeros).

LOS = 0 when a valid signal is being received.

An interrupt will occur when LOS changes state unless a “1” is written to LOS disabling the in-

terrupt.

DS211PF1P8

19

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