µPD703003
The configurations of the timer/counter functions are shown below.
Figure 8-1. Block Diagram of Timer 1 (16-bit timer/event counter)
TCLR1n
Edge
detect
φ /2 φ m
φ /4
φm
φ m/4 Note 1
φ m/8
φ m/32
Note 2
TI1n
Edge detect
INTP1n0
INTP1n1
INTP1n2
INTP1n3
Edge detect
Edge detect
Edge detect
Edge detect
Clear and
start
Clear and start
TM1n (16 bits)
CC1n0
CC1n1
CC1n2
CC1n3
Notes 1. Internal count clock
2. External count clock
3. Priority to reset
INTOV1n
INTCC1n0
INTCC1n1
SQ
RNote3 Q
TO1n0
SQ
RNote3 Q
INTCC1n2
INTCC1n3
TO1n1
Remark φ : internal system clock
n = 1 to 4
Figure 8-2. Block Diagram of Timer 4 (16-bit interval timer)
φ /2
φ /4 φ m
φ /16
φ /32
φ m Note
φ m/32
Note Internal count clock
Remark φ : Internal system clock
TM4 (16-bit)
CM4
Clear and start
INTCM4
Data Sheet U12261EJ2V1DS00
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