SM5L1 データシートの表示（PDF） - Sharp Electronics
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SM5L1 Datasheet PDF : 27 Pages
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4-Bit Single Chip Microcomputers
SM5L1/SM5L2/SM5L3
(REGISTER)
BM = 1000
BL = 0000
BM = 1001
BL = 0000
BM = 1000
BL = 0001
.
.
.
COMMON OUTPUTS
H3 H2 H1 H0
BM REGISTER
BM = 1000
SM5L1
BM = 1000
BL = 1001
BM = 1001
BL = 1001
BM = 1000
BL = 1010
SM5L2
BM = 1001
BL = 1111
BM = 1010
BL = 0000
BM = 1011
BL = 0000
SM5L3
BM = 1011
BL = 0011
BM = 1010
BL = 0100
BM = 1011
BL = 0100
SEGMENT
S0
S1
S2
LCD
DRIVE CIRCUIT
SM5L1 SM5L2 SM5L3
S18
S31
S39
S19
S32
S40
S30
S33
S41
M3 M2 M1 M0 (RAM BIT)
5L1-14
Figure 14. Relationship between the Display RAM and LCD Segment Outputs/Common Outputs
Program Counter PC and
Stack Register SR
A ROM address is specified by the program counter
(PC). The PC is comprised of 12 bits where 6-bits (PU)
are used to specify the page, and 6-bit are used to
specify the step. PU is a register and PL is a binary
counter. The program counter PC and the Stack Reg-
ister SR are shown in Figure 15.
The table reference instruction PAT executes a sim-
ilar operation to that of the subroutine jump and uses
one level of the stack register.
Program Memory (ROM)
The ROM is used for program storage. The ROM
capacity of the SM5Lx is 2,048/3,072/4,096-step. The
ROM is organized into 32/48/64-page where one page
is organized into 64 steps.
PROGRAM COUNTER PC
PAGE
STEP
PU
PL
MSB
LSB
PUSH
POP
SR (LEVEL 1)
SR (LEVEL 2)
SR (LEVEL 3)
SR (LEVEL 4)
STACK REGISTER SR
Figure 15. Program Counter PC and Stack Register SR
Microcomputer Data Sheet
5L1-15
11
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