GS816272CC データシートの表示（PDF） - Giga Semiconductor

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GS816272CC

256K x 72 18Mb S/DCD Sync Burst SRAMs

Giga Semiconductor 

Preliminary

GS816272CC-333/300/250/200/150

VDDQ3 Range Logic Levels

Parameter

Symbol Min.

Typ.

Max.

Unit Notes

VDD Input High Voltage

VIH

2.0

—

VDD + 0.3

V

1

VDD Input Low Voltage

VIL

–0.3

—

0.8

V

1

VDDQ I/O Input High Voltage

VIHQ

2.0

—

VDDQ + 0.3

V

1,3

VDDQ I/O Input Low Voltage

VILQ

–0.3

—

0.8

V

1,3

Notes:

1. The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-

tions quoted are evaluated for worst case in the temperature range marked on the device.

2. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.

3. VIHQ (max) is voltage on VDDQ pins plus 0.3 V.

VDDQ2 Range Logic Levels

Parameter

Symbol Min.

Typ.

Max.

Unit Notes

VDD Input High Voltage

VIH

0.6*VDD

—

VDD + 0.3

V

1

VDD Input Low Voltage

VIL

–0.3

—

0.3*VDD

V

1

VDDQ I/O Input High Voltage

VIHQ

0.6*VDD

—

VDDQ + 0.3

V

1,3

VDDQ I/O Input Low Voltage

VILQ

–0.3

—

0.3*VDD

V

1,3

Notes:

1. The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-

tions quoted are evaluated for worst case in the temperature range marked on the device.

2. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.

3. VIHQ (max) is voltage on VDDQ pins plus 0.3 V.

Recommended Operating Temperatures

Parameter

Symbol Min.

Typ.

Max.

Unit Notes

Ambient Temperature (Commercial Range Versions)

TA

0

25

70

°C

2

Ambient Temperature (Industrial Range Versions)

TA

–40

25

85

°C

2

Notes:

1. The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-

tions quoted are evaluated for worst case in the temperature range marked on the device.

2. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.

Rev: 1.01 2/2005

11/31

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2004, GSI Technology

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