HYS72D128300GBR-5-B データシートの表示（PDF） - Infineon Technologies
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HYS72D128300GBR-5-B Datasheet PDF : 45 Pages
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HYS72D[128/256][300/320/321/500][GBR/HR]-[5/6/7/7F]-B
Registered Double Data Rate SDRAM Module
Electrical Characteristics
Table 7 Electrical Characteristics and DC Operating Conditions (cont’d)
Parameter
Symbol
Values
Unit Note/Test Condition 1)
Min.
Typ.
Max.
Input Leakage Current
II
–2
2
µA Any input 0 V ≤ VIN ≤ VDD;
All other pins not under test
= 0 V 8)9)
Output Leakage Current IOZ
–5
Output High Current,
IOH
—
Normal Strength Driver
5
–16.2
µA DQs are disabled;
0 V ≤ VOUT ≤ VDDQ
mA VOUT = 1.95 V
Output Low
IOL
Current, Normal Strength
Driver
16.2
—
mA VOUT = 0.35 V
1) 0 °C ≤ TA ≤ 70 °C
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions, VDDQ must be less than or equal to VDD.
4) Peak to peak AC noise on VREF may not exceed ± 2% VREF (DC). VREF is also expected to track noise variations in VDDQ.
5) VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal
to VREF, and must track variations in the DC level of VREF.
6) VID is the magnitude of the difference between the input level on CK and the input level on CK.
7) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire
temperature and voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the
maximum difference between pull-up and pull-down drivers due to process variation.
8) Inputs are not recognized as valid until VREF stabilizes.
9) Values are shown per DDR SDRAM component
Data Sheet
15
Rev. 0.5, 2003-12
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