LC573102A データシートの表示（PDF） - SANYO -> Panasonic
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LC573102A Datasheet PDF : 16 Pages
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LC573104A, 573102A
LC573100 Series Instructions
Mnemonic Instruction code
Function
TAAT
0 0 0 0 0 0 0 1 AC, TRGE ← ROM
MTR
0 0 0 1 0 0 1 0 M (DP) ← TREG
ASR0
ASR1
ASL0
ASL1
INC
0 0 0 1 1 0 0 0 ACn ← ACn+1, AC3 ← 0
0 0 0 1 1 0 0 1 ACn ← ACn+1, AC3 ← 1
0 0 0 1 1 0 1 0 ACn ← ACn–1, AC0 ← 0
0 0 0 1 1 0 1 1 ACn ← ACn–1, AC0 ← 1
1 0 0 1 1 0 0 0 AC, M (DP) ← M (DP)+1
DEC
1 0 0 1 1 0 0 1 AC, M (DP) ← M (DP)–1
ADC
1 0 0 0 0 0 0 0 AC ← (AC)+[M (DP)]+CF
ADC*
1 0 0 0 1 0 0 0 AC, M (DP) ← (AC)+[M (DP)]+CF
ADCI X
SBC
1001
––––
1000
0 0 0 0 AC ← (AC)+X+CF
X3X2X1X0
0 0 0 1 AC ← (AC)+[M (DP)]+CF
SBC*
1 0 0 0 1 0 0 1 AC, M (DP) ← (AC)+[M (DP)]+CF
SBCI X
ADD
1001
––––
1000
0 0 0 1 AC ← (AC)+X+CF
X3X2X1X0
0 0 1 0 AC ← (AC)+[M (DP)]
ADD*
1 0 0 0 1 0 1 0 AC, M (DP) ← (AC)+[M (DP)]
ADDI X
SUB
1001
––––
1000
0 0 1 0 AC ← (AC)+X
X3X2X1X0
0 0 1 1 AC ← (AC)+[M (DP)]+1
SUB*
1 0 0 0 1 0 1 1 AC, M (DP) ← (AC)+[M (DP)]+1
SUBI X
ADN
1001
––––
1000
0 0 1 1 AC ← (AC)+X+1
X3X2X1X0
0 1 0 0 AC ← (AC)+[M (DP)]
ADN*
1 0 0 0 1 1 0 0 AC, M (DP) ← (AC)+[M (DP)]
ADNI X
AND
1001
––––
1000
0 1 0 0 AC ← (AC)+X
X3X2X1X0
0 1 0 1 AC ← (AC) [M (DP)]
AND*
1 0 0 0 1 1 0 1 AC, M (DP) ← (AC) [M (DP)]
ANDI X
EOR
1001
––––
1000
0 1 0 1 AC ← (AC) X
X3X2X1X0
0 1 1 0 AC ← (AC) ∨ [M (DP)]
EOR*
1 0 0 0 1 1 1 0 AC, M (DP) ← (AC) ∨ [M (DP)]
EORI X
OR
1001
––––
1000
0 1 1 0 AC ← (AC) ∨ X
X3X2X1X0
0 1 1 1 AC ← (AC) ∨ [M (DP)]
OR*
1 0 0 0 1 1 1 1 AC, M (DP) ← (AC) ∨ [M (DP)]
ORI X
1 0 0 1 0 1 1 1 AC ← (AC) ∨ X
– – – – X3X2X1X0
Function description
Status
flag
affected
1 2 Contents of ROM on current page, addressed by PC whose low-orderd 8 bits
are replaced with contents of AC and M (DP), are loaded to AC and TREG
1 1 Stores the conternts of TREG memory location pointed to by DP.
1 1 Shifts the contents of the AC right and enter 0 into the MSB.
1 1 Shifts the contents of the AC right and enter 1 into the MSB.
1 1 Shifts the contents of the AC left and enter 0 into the LSB.
1 1 Shifts the contents of the AC left and enter 1 into the LSB.
1 1 Memory M (DP) contents incremented +1, and loaded to AC and M (DP).
1 1 Memory M (DP) contents decremented –1, and loaded to AC and M (DP).
1 1 AC, memory M (DP) and CF contents are binary-added and the result loaded CF
to AC.
1 1 AC, memory M (DP) and CF contents are binary-added and the result loaded CF
to AC, M (DP).
2 2 AC, immediate data and CF contents are binary-added, and the result loaded CF
to AC.
1 1 AC, memory M (DP) and CF contents are binary-subtracted, and the result
CF
loaded to AC.
1 1 AC, memory M (DP) and CF contents are binary-subtracted, and the result
CF
loaded to AC and M (DP).
2 2 AC, immediate data and CF contents are binary-subtracted and the result
CF
loaded to AC.
1 1 AC and memory M (DP) contents are binary-added and the result loaded to CF
AC.
1 1 AC and memory M (DP) contents are binary-added and the result loaded to CF
AC and M (DP).
2 2 AC and immediate data contents are binary-added and the result loaded to CF
AC.
1 1 AC and memory M (DP) contents are binary-subtracted and the result loaded CF
to AC.
1 1 AC and memory M (DP) contents are binary-subtracted and the result loaded CF
to AC and M (DP).
2 2 AC and immediate data contents are binary-subtracted and the result loaded in CF
AC.
1 1 AC and memory M (DP) contents are binary-added and the result loaded to
AC.
1 1 AC and memory M (DP) contents are binary-added and the result loaded to
AC and M (DP).
2 2 AC and immediate data contents are binary-added and the result loaded in AC.
1 1 AC and memory M (DP) contents are ANDed and the result loaded to AC.
1 1 AC and memory M (DP) contents are ANDed and the result loaded to AC and
M (DP).
2 2 AC and immediate data contents are ANDed and the result loaded to AC.
1 1 AC and memory M (DP) are exclusive ORed and the result loaded to AC.
1 1 AC and memory M (DP) are exclusive ORed, and the result loaded to AC and
M (DP).
2 2 AC and immediate data are exclusive ORed and the result loaded to AC.
1 1 AC and memory M (DP) are ORed and the result loaded to AC.
1 1 AC and memory M (DP) are ORed and the result loaded to AC and M (DP).
2 2 AC and immediate data are ORed and the result loaded to AC.
Continued on next page.
No.4144–12/16
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