M295V400B-120M1R データシートの表示（PDF） - STMicroelectronics

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M295V400B-120M1R

4 Mbit (512Kb x8 or 256Kb x16, Boot Block)Single Supply Flash Memory

STMicroelectronics 

M29F400T, M29F400B

Figure 7. Write AC Waveforms, W Controlled

A0-A17/

A–1

E

G

W

DQ0-DQ7/

DQ8-DQ15

VCC

RB

tAVWL

tELWL

tGHWL

tVCHEL

tAVAV

VALID

tWLAX

tWHEH

tWHGL

tWLWH

tDVWH

VALID

tWHWL

tWHDX

tWHRL

AI01869C

Note: Address are latched on the falling edge of W, Data is latched on the rising edge of W.

POWER SUPPLY

Power Up

The memoryCommand Interface is reset on power

up to Read Array. Either E or W must be tied to VIH

during Power Up to allow maximum security and

the possibility to write a command on the first rising

edge of E and W. Any write cycle initiation is

blocked when Vcc is below VLKO.

Supply Rails

Normal precautions must be taken for supply volt-

age decoupling; each device in a system should

have the VCC rail decoupled with a 0.1µF capacitor

close to the VCC and VSS pins. The PCB trace

widths should be sufficient to carry the VCC pro-

gram and erase currents required.

20/34

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