M29W008EB データシートの表示（PDF） - STMicroelectronics
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M29W008EB Datasheet PDF : 43 Pages
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4 Command interface
M29W008ET, M29W008EB
blocks. Each additional block must therefore be selected within 50µs of the last block. The 50µs
timer restarts when an additional block is selected. The Status Register can be read after the
sixth Bus Write operation. See the Status Register for details on how to identify if the Program/
Erase Controller has started the Block Erase operation.
If any selected blocks are protected then these are ignored and all the other selected blocks
are erased. If all of the selected blocks are protected the Block Erase operation appears to start
but will terminate within about 100µs, leaving the data unchanged. No error condition is given
when protected blocks are ignored.
During the Block Erase operation the memory will ignore all commands except the Erase
Suspend command. Typical program times are given in Table 4: Program, Erase Times and
Program, Erase Endurance Cycles. All Bus Read operations during the Block Erase operation
will output the Status Register on the Data Inputs/Outputs. See the section on the Status
Register for more details.
After the Block Erase operation has completed the memory will return to the Read Mode,
unless an error has occurred. When an error occurs the memory will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and return
to Read mode.
The Block Erase Command sets all of the bits in the unprotected selected blocks to ’1’. All
previous data in the selected blocks is lost.
4.8 Chip Erase command
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations are
required to issue the Chip Erase Command and start the Program/Erase Controller.
If any blocks are protected then these are ignored and all the other blocks are erased. If all of
the blocks are protected the Chip Erase operation appears to start but will terminate within
about 100µs, leaving the data unchanged. No error condition is given when protected blocks
are ignored.
During the erase operation the memory will ignore all commands. It is not possible to issue any
command to abort the operation. Typical program times are given in Table 4: Program, Erase
Times and Program, Erase Endurance Cycles. All Bus Read operations during the Chip Erase
operation will output the Status Register on the Data Inputs/Outputs. See the section on the
Status Register for more details.
After the Chip Erase operation has completed the memory will return to the Read Mode, unless
an error has occurred. When an error occurs the memory will continue to output the Status
Register. A Read/Reset command must be issued to reset the error condition and return to
Read Mode.
The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All
previous data is lost.
4.9 Erase Suspend command
The Erase Suspend Command may be used to temporarily suspend a Block Erase operation
and return the memory to Read mode. The command requires one Bus Write operation.
The Program/Erase Controller will suspend within the Erase Suspend Latency Time after the
Erase Suspend Command is issued (see Table 4: Program, Erase Times and Program, Erase
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