M58MR032-ZCT データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

M58MR032-ZCT

32 Mbit (2Mb x16, Mux I/O, Dual Bank, Burst) 1.8V Supply Flash Memory

STMicroelectronics 

M58MR032C, M58MR032D

Table 22. Burst Read Information

Offset

Data

(P)+13h = 48h 0003h Page-mode read capability

Description

bits 0-7

’n’ such that 2n HEX value represents the number of read-

page bytes. See offset 28h for device word width to

determine page-mode data output width. 00h indicates

no read page buffer.

Value

8 Byte

(P+14)h = 49h

(P+15)h = 4Ah

(P+16)h = 4Bh

(P+17)h = 4Ch

(P+18)h = 4Dh

(P+19)h = 4Eh

0003h

0001h

0002h

0007h

0028h

0001h

Number of synchronous mode read configuration fields that follow. 00h

3

indicates no burst capability.

Synchronous mode read capability configuration 1

4

bit 3-7

bit 0-2

Reserved

’n’ such that 2n+1 HEX value represents the maximum

number of continuous synchronous reads when the device is

configured for its maximum word width. A value of 07h

indicates that the device is capable of continuous linear bursts

that will output data until the internal burst counter reaches

the end of the device’s burstable address space. This field’s

3-bit value can be written directly to the read configuration

register bit 0-2 if the device is configured for its maximum

word width. See offset 28h for word width to determine the

burst data output width.

Synchronous mode read capability configuration 2

8

Synchronous mode read capability configuration 3

Cont.

Max operating clock frequency (MHz)

40 MHz

Supported handshaking signal (WAIT pin)

bit 0

during synchronous read

bit 1

during asynchronous read

(1 = Yes, 0 = No)

Yes

(1 = Yes, 0 = No)

No

Table 23. Security Code Area

Offset

80h

81h

82h

83h

84h

85h

86h

87h

88h

Data

0000-0000-0000-0XX0

XXXX

XXXX

XXXX

XXXX

XXXX

XXXX

XXXX

XXXX

Description

Lock Protection Register

64 bits: unique device number

64 bits: User Programmable OTP

28/52

Share Link: