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M68HC12B データシートの表示(PDF) - Motorola => Freescale

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M68HC12B
Motorola
Motorola => Freescale Motorola
M68HC12B Datasheet PDF : 362 Pages
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Freescale Semiconductor, Inc.
General Description
1.2 Features
Features include:
• 16-bit CPU12:
– Upwardly compatible with the M68HC11 instruction set
– Interrupt stacking and programmer’s model identical to the M68HC11
– 20-bit arithmetic logic unit (ALU)
– Instruction queue
– Enhanced indexed addressing
– Fuzzy logic instructions
• Multiplexed bus:
– Single chip or expanded
– 16-bit by 16-bit wide or 16-bit by 8-bit narrow modes
• Memory:
– 32-Kbyte FLASH electrically erasable, programmable read-only
memory (EEPROM) with 2-Kbyte erase-protected boot block —
MC68HC912B32 and MC68HC912BC32 only
– 32-Kbyte ROM — MC68HC12BE32 and MC68HC12BC32 only
– 768-byte EEPROM
– 1-Kbyte random-access memory (RAM) with single-cycle access for
aligned or misaligned read/write
• 8-channel, 10-bit analog-to-digital converter (ATD)
• 8-channel standard timer module (TIM) — MC68HC912B32 and
MC68HC(9)12BC32 only:
– Each channel fully configurable as either input capture or output
compare
– Simple pulse-width modulator (PWM) mode
– Modulus reset of timer counter
• Enhanced capture timer (ECT) — MC68HC12BE32 only:
– 16-bit main counter with 7-bit prescaler
– Eight programmable input capture or output compare channels; four of
the eight input captures with buffer
– Input capture filters and buffers, three successive captures on four
channels, or two captures on four channels with a capture/compare
selectable on the remaining four
– Four 8-bit or two 16-bit pulse accumulators
– 16-bit modulus down-counter with 4-bit prescaler
– Four user-selectable delay counters for signal filtering
Data Sheet
20
General Description
For More Information On This Product,
Go to: www.freescale.com
M68HC12B Family — Rev. 9.0
MOTOROLA

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