MCM72FB8ML7.5R データシートの表示（PDF） - Motorola => Freescale

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MCM72FB8ML7.5R

256K x 72 Bit BurstRAM Multichip Module

Motorola => Freescale 

MCM72FB8ML FLOW–THROUGH STOP CLOCK WITH READ TIMING

K

ADSP

ADDRESS

A1

A2

ADV

DQx

Q(A1)

Q(A1 + 1)

Q(A2)

ADSP

(INITIATES

BURST READ)

CLOCK STOP

(CONTINUE

BURST READ)

WAKE UP ADSP

(INITIATES BURST READ)

NOTE: For lowest possible power consumption during stop clock, the addresses should be driven to a low state (VIL).

Best results are obtained if VIL < 0.2 V.

MOTOROLA FAST SRAM

MCM72FB8ML  MCM72PB8ML

15

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