NCP1611BDR2G(2011) データシートの表示（PDF） - ON Semiconductor
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NCP1611BDR2G Datasheet PDF : 28 Pages
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NCP1611
TYPICAL ELECTRICAL CHARACTERISTICS TABLE (Conditions: VCC = 15 V, TJ from −40°C to +125°C, unless otherwise
specified)
Symbol
Rating
Min
Typ
Max Unit
START−UP AND SUPPLY CIRCUIT
VCC(on)
Start−Up Threshold, VCC increasing:
A version
B version
V
9.75 10.50 11.25
15.80 17.00 18.20
VCC(off)
VCC(HYST)
Minimum Operating Voltage, VCC falling
Hysteresis (VCC(on) − VCC(off))
A version
B version
8.50 9.00 9.50
V
V
0.75 1.50
−
6.00 8.00
−
ICC(start)
Start−Up Current, VCC= 9.4 V
ICC(op)1
Operating Consumption, no switching (Vsense pin being grounded)
ICC(op)2
Operating Consumption, 50 kHz switching, no load on DRV pin
CURRENT CONTROLLED FREQUENCY FOLD−BACK
−
20
50
mA
−
0.5
1.0
mA
−
2.0
3.0
mA
TDT1
TDT2
TDT3
IDT1
IDT2
VSKIP−H
VSKIP−L
VSKIP−HYST
GATE DRIVE
Dead−Time, VFFcontrol = 2.60 V (Note 4)
Dead−Time, VFFcontrol = 1.75 V
Dead−Time, VFFcontrol = 1.00 V
FFcontrol pin current, Vsense = 1.4 V and Vcontrol maximum
FFcontrol pin current, Vsense = 2.8 V and Vcontrol maximum
FFcontrol pin Skip Level, VFFcontrol rising
FFcontrol pin Skip Level, VFFcontrol falling
FFcontrol pin Skip Hysteresis
−
−
0
ms
14
18
22
ms
32
38
44
ms
180
200
220
mA
110
135
160
mA
−
0.75 0.85
V
0.55 0.65
−
V
50
−
−
mV
TR
Output voltage rise−time @ CL = 1 nF, 10−90% of output signal
TF
Output voltage fall−time @ CL = 1 nF, 10−90% of output signal
ROH
Source resistance
ROL
Sink resistance
ISOURCE
Peak source current, VDRV = 0 V (guaranteed by design)
ISINK
Peak sink current, VDRV = 12 V (guaranteed by design)
VDRVlow
DRV pin level at VCC close to VCC(off) with a 10 kW resistor to GND
VDRVhigh
DRV pin level at VCC = 35 V (RL = 33 kW, CL = 1 nF)
REGULATION BLOCK
−
30
−
ns
−
20
−
ns
−
10
−
W
−
7.0
−
W
−
500
−
mA
−
800
−
mA
8.0
−
−
V
10
12
14
V
VREF
Feedback Voltage Reference:
from 0°C to 125°C
Over the temperature range
V
2.44 2.50 2.54
2.42 2.50 2.54
IEA
Error Amplifier Current Capability
GEA
Error Amplifier Gain
VCONTROL
−VCONTROLMAX
−VCONTROLMIN
Vcontrol Pin Voltage
− @ VFB = 2 V
− @ VFB = 3 V
VOUTL / VREF
Ratio (VOUT Low Detect Threshold / VREF) (guaranteed by design)
HOUTL / VREF
Ratio (VOUT Low Detect Hysteresis / VREF) (guaranteed by design)
IBOOST
Vcontrol Pin Source Current when (VOUT Low Detect) is activated
CURRENT SENSE AND ZERO CURRENT DETECTION BLOCKS
−
±20
−
mA
110
220
290
mS
V
−
4.5
−
−
0.5
−
95.0 95.5 96.0
%
−
−
0.5
%
180
220
250
mA
VCS(th)
Current Sense Voltage Reference
450
500
550
mV
4. There is actually a minimum dead−time that is the delay between the core reset detection and the DRV turning on (TZD parameter of the
“Current Sense and Zero Current Detection Blocks” section).
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