LH28F800SU データシートの表示（PDF） - Sharp Electronics

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LH28F800SU

8M (512K × 16, 1M × 8) Flash Memory

Sharp Electronics 

8M (512K × 16, 1M × 8) Flash Memory

LH28F800SU

LH28F800SU Performance Enhancement Command Bus Definitions

COMMAND

FIRST BUS CYCLE SECOND BUS CYCLE

THIRD BUS CYCLE

MODE

OPER. ADDR. DATA OPER. ADDR. DATA OPER. ADDR. DATA

NOTE

Read Extended

Status Register

Write X

71H Read

RA

GSRD

BSRD

1

Page Buffer Swap

Write X 72H

7

Read Page Buffer

Write X 75H Read PA PD

Single Load to

Page Buffer

Write X 74H Write PA PD

x8 Write X E0H Write X BCL Write X

Sequential Load to

Page Buffer

x16 Write X E0H Write X WCL Write X

BCH

WCH

4, 6, 10

4, 5,

6, 10

Page Buffer Write

x8 Write

X

0CH Write

A0

BC

(L, H)

Write

WA

BC (H, L)

3, 4,

9, 10

to Flash

x16 Write X 0CH Write X WCL Write WA WCH 4, 5, 10

Two-Byte Write

x8 Write

X

FBH Write

A0

WD

(L, H)

Write

WA WD (H, L)

3

Block

Erase/Confirm

Write X 20H Write BA D0H

Lock Block/Confirm

Write X 77H Write BA D0H

Upload Status

Bits/Confirm

Write X 97H Write X D0H

2

Upload Device

Information

Write X 99H Write X D0H

Erase All Unlocked

Blocks/Confirm

Write X A7H Write X D0H

RY »/BY » Enable to

Level-Mode

Write X 96H Write X 01H

8

RY »/BY » Pulse-On-

Write

Write X 96H Write X 02H

8

RY »/BY » Pulse-On-

Erase

Write X 96H Write X 03H

8

RY »/BY » Disable

Write X 96H Write X 04H

8

Sleep

Write X F0H

Abort

Write X 80H

ADDRESS

BA = Block Address

PA = Page Buffer Address

RA = Extended Register Address

WA = Write Address

X = Don’t Care

DATA

AD = Array Data

PD = Page Buffer Data

BSRD = BSR Data

GSRD = GSR Data

WC (L, H) = Word Count (Low, High)

BC (L, H) = Byte Count (Low, High)

WD (L, H) = Write Data (Low, High)

11

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