SAA2502 データシートの表示（PDF） - Philips Electronics

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SAA2502

ISO/MPEG Audio Source Decoder

Philips Electronics 

Philips Semiconductors

ISO/MPEG Audio Source Decoder

Preliminary specification

SAA2502

7.4 Decoder core

The SAA2502 fully complies with MPEG1 (layer I and II)

and MPEG2 (layer I and II, L0 and R0 channels). Also

some DAB specific features are supported. Free format bit

rate is not supported in master input mode. Several

aspects of the decoding process and audio

post-processing features are offered.

7.4.1 FRAME SYNCHRONIZATION TO INPUT DATA STREAMS

The SAA2502 has to localize the start of a frame before

decoding may begin. The process of locating the start of a

frame is called frame synchronization. There are

4 different modes of frame synchronization available.

These modes are in order of decreasing speed of frame

synchronization.

7.4.1.1 Frame sync pulse mode

In this mode the start of each frame is marked by a rising

edge of the CDSY input pin. It is the fastest and most

reliable method of frame synchronization. It is activated by

loading 11 into the SYMOD control flags.

7.4.1.2 Byte aligned mode

This default mode may also be enforced by loading 10 into

the SYMOD control flags. The start of a frame is located by

detection of the 14-bit sync pattern 111111111111X1.

The probability of correct sync detection is enhanced by

the fact that a rising edge of the CDSY input pin marks a

location which is byte aligned with frame bounds. A rising

edge of CDSY is not required at every byte edge but

should occur at regular intervals for reliable frame

synchronization.

7.4.1.3 Layer II non-byte aligned mode

This mode may be entered by loading 01 into the SYMOD

control flags. Frame start is found by detection of the 15-bit

sync pattern 111111111111X10.

As this pattern is slightly longer than the previous one and

also contains at least one 1-to-0 transition, it may be used

to obtain frame synchronization in the absence of any

external alignment indication (CDSY is ignored and

therefore may be left floating).

7.4.1.4 General non-byte aligned mode

This mode may be entered by loading 00 into the SYMOD

control flags. Frame start is detected by alternating

searches for a 15-bit sync pattern 111111111111X10

(identical to the layer II mode search pattern) and a15-bit

sync pattern 0111111111111X1.

Because valid MPEG streams exist that do not contain the

first pattern while other valid MPEG streams do not contain

the second pattern a time-out counter will always be active

in this mode. Time-out length is set to slightly more then

72 ms which is the length of the longest audio frame.

The second pattern operates for layer I and layer II, but

successful synchronization is only guaranteed when the

last bit of the previous frame equals logic 0. Consequently

this mode synchronizes to layer I input bit streams only if

frames at least sometimes end with a logic 0 bit. Both

patterns contain the 1-to-0 or 0-to-1 transition required for

a reliable start-of-frame detection in the absence of

external alignment information.

If the SAA2502 starts at a random place in the bit stream,

it may take up to one frame before a sync pattern or sync

pulse is encountered. Because sync patterns may be

emulated by frame content, detection of a sync is always

followed by a verification period to check whether the sync

is located at the start of a frame. The length of the

verification period depends on the presence of CRC

protection and/or a free format bit rate index. During sync

search and verification the baseband audio outputs are

muted. If verification fails the synchronization process is

restarted.

Table 6 Frame sync verification

INPUT DATA FORMAT

MPEG; no CRC

MPEG with CRC

LENGTH OF VERIFICATION PERIOD

FREE FORMAT BIT RATE

NON-FREE FORMAT BIT RATE

2 frame bit rate

1 frame

1 frame

0 frame

1997 Nov 17

16

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