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SAA7392 データシートの表示(PDF) - Philips Electronics

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SAA7392
Philips
Philips Electronics Philips
SAA7392 Datasheet PDF : 76 Pages
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Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.2.6 INTERRUPT ENABLE REGISTER 2 (INTEN2)
Table 13 Interrupt Enable Register 2 (address 21H) - WRITE
7
6
5
BankSwitch SyncErrorEn DataNotValid
En
En
4
QSyncEn
3
2
ATIPSyncEn LaserOnEn
1
LaserOffEn
0
XErrorLarge
En
Table 14 Description of IntEn2 bits
BIT
SYMBOL
DESCRIPTION
7
BankSwitch If BankSwitchEn = 1, then BankSwitch interrupt is enabled.
En
6
SyncErrorEn If SyncErrorEn = 1, then SyncError interrupt is enabled.
5
DataNotVali If DataNotValidEn = 1, then DataNotValid interrupt is enabled.
dEn
4
QSyncEn If QSyncEn = 1, then QSync interrupt is enabled.
3
ATIPSyncEn If ATIPSyncEn = 1, then ATIPSync interrupt is enabled.
2
LaserOnEn If LaserOnEn = 1, then LaserOn interrupt is enabled.
1
LaserOffEn If LaserOffEn = 1, then LaserOff interrupt is enabled.
0
XErrorLarge If XerrorLarge = 1, then XErrorLarge interrupt is enabled.
En
7.2.7 SOFT RESET REGISTER (SOFTRESET)
Table 15 Soft Reset Register (address 1BH) - WRITE
7
6
5
4
3
2
1
0
SReset1
Table 16 Description of SoftReset bits
BIT
7 to 1
0
SYMBOL
SReset1
DESCRIPTION
These 7 bits are reserved.
When set, synchronisation with PLUM on subcode transfer has failed; reset when
a logic 1 is written to this bit (Status2).
This bit is an active HIGH reset to the following blocks: Encoder/decoder, EFM
modulator, Encode control block, Serial input/output block and Encode subcode insert
block. The clock control, EFM PLL, tacho, motor interface and wobble interface remain
running.
Soft reset will reset the following registers: EFMPresetCount, EFMModulateConfig,
EFMModulateConfig2, EncodeXOffset, EncodeWriteControl, EncodeStartOffset,
EncodeStopOffset, SubPresetCount, SubConfig1, Subconfig2, SubStartData, SubData,
InputConfig, DecoMode, Output1, Output2 and Output3.
A soft reset is mandatory in the following cases:
1. After programming the BCLK clock
2. When switching from encode to decode
3. When switching from decode to encode.
2000 Mar 21
15

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