SC905 データシートの表示（PDF） - Semtech Corporation
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SC905 Datasheet PDF : 21 Pages
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SC905
POWER MANAGEMENT
Applications Information (Cont.)
The voltage can be changed from its default state after
start-up by writing to the appropriate voltage code regis-
ter.
Active Shutdown
The shutdown control bits determine how the on-chip active
shutdown switches behave. Register 7 is the active shut-
down control register and is used to control the shutdown
behavior. Each LDO has a specific shutdown bit assigned
to it. When the active shutdown bit is enabled (set to 1),
the output capacitance on the LDO output is discharged by
an on-chip FET when the LDO is disabled. When the active
shutdown bit is disabled (set to 0), the output capacitance
on the LDO output is discharged by the load. The default
state for each LDO active shutdown bit is on.
correct register information to the SC905 to set it to the
user state.
2) The MSM reads back all of the information to verify
the data. Then it reads back the DSB again to ensure it is
still set to 0. This verifies that no reset took place during
the time that the multiple writes and read verifications
happened. If the DSB has been reset to 1, this process
needs to be repeated since the chip was reset sometime
during the initialization. Once the MSM and the SC905
are synchronized, the DSB can be read back as a status
check periodically, as needed. If it is ever set back to the
default state, a new synchronization process is required.
This handshake-style protocol makes sure that the MSM
and SC905 are always synchronized.
Default Status Bit
In many multi-threaded environments it is necessary to
maintain synchronization between the host micro-control-
ler and the target IC. The SC905 has a default status bit
(DSB) that will facilitate this task. The DSB can be useful in
keeping the MSM and the SC905 synchronized. However,
this is only useful if the MSM is powered by an external
switching regulator such as the SC190.
The DSB is bit 7 of register 0, and shares this register space
with the PAD voltage control bits. The DSB is only set to 1
during power-up to indicate that the part is set to the default
state. Moreover, the DSB cannot be written to a 1 through
the I2C interface the way the other bits in this register can;
it can only be cleared to 0 through the I2C interface. This
feature prevents a software race condition by always writing
to register 0 with bit 7 high when changing the PAD control
voltage. To clear the bit simply write a 0 to bit 7.
Applying the DSB
Upon power-up, the SC905 LDOs and internal registers are
set to their default state. The DSB is set to a 1 to indicate
that the SC905 is in its default state. Upon reading this
defaulted state condition, the MSM knows to perform
whatever synchronization is needed to set the SC905 into
a known user state. This user state is entered by a two-
stage process.
1) The MSM writes a 0 to the DSB indicating its desire
to modify the state of the SC905. It then writes all of the
LDO Power-On Sequence
When the SC905 first turns on, the four LDOs that default
on are sequenced in the following fashion: CORE is the first
to turn on, then PAD, then ANA and finally TCXO. During the
power-on sequence, each LDO has a 100μs delay from one
LDO turning on to the other. This process eliminates large
voltage spikes across the battery supply during power-up.
For further information on LDO power on sequencing, refer
to the Timing Diagram on page 17.
Protection Circuitry
The SC905 contains protection circuitry that prevents the
device from operating in an unspecified state. These in-
clude Under-voltage Lockout Protection, Over-temperature
Protection and Short-circuit Protection.
Under-Voltage Lockout
The SC905 provides an under-voltage lockout (UVLO) circuit
to protect the device from operating in an unknown state
if the input voltage supply is too low.
When the battery voltage drops below the UVLO threshold,
as defined in the Electrical Characteristics section, the
LDOs are disabled and RESB is held low. When the battery
voltage is increased above the hysteresis level, the LDOs
are re-enabled into their previous states, provided PGOOD
has remained high. If PGOOD goes low, the SC905 will shut
down. When powering-up with a battery voltage below the
UVLO threshold, RESB will be held low.
© 2006 Semtech Corp.
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