87C196(1998) データシートの表示（PDF） - Intel

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87C196
(Rev.:1998)

ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2.0

Intel 

87C196CA/87C196CB - Express

Figure 5. Chip Configuration Registers

CCB (2018H: Byte)

CCB1 (201AH: Byte)

0 PD =

1 BW0 =

2 WR =

3 ALE =

4 IRC0 =

5 IRC1 =

6 LOC0 =

7 LOC1 =

“1” Enables Powerdown

0 CCR2

See Table

1 IRC2

“1” = WR#/BHE - “0” = WRL#/WRH# 2 BW1

“1” = ALE - “0” = ADV

3 WDE

} See Table

4

1

5

0

} See Table

6 MEMSEL0

7 MEMSEL1

= “1” Fetch CCB2 (“0” for CA)

= See Table

= See Table

= “0” = Always Enabled

= Reserved Must Be “1”

= Reserved Must Be “1”

= See Table

= See Table

CCB2 (201CH: Byte) (CB Only)

0

0

= Reserved Must Be “0”

1 MODE16

2 REMAP

3

1

4

1

5

1

6

1

7

1

= Select 16-Bit or 24-Bit Mode

} =

“0”–Select EPROM/CODERAM in Segment 0FFH only

“1”–Select Both Segment 0FFH and Segment 00H

= Reserved Must Be “1”

= Reserved Must Be “1”

= Reserved Must Be “1”

= Reserved Must Be “1”

= Reserved Must Be “1”

LOC1

0

0

1

1

LOC0

Function

0 Read and Write Protected

1 Write Protected Only

0 Read Protected Only

1 No Protection

IRC2

0

1

1

1

1

IRC1

0

0

0

1

1

IRC0 Max Wait States

0 Zero Wait States

0 1 Wait State

1 2 Wait States

0 3 Wait States

1 INFINITE

MSEL1

0

0

1

1

MSEL0 “CB” Bus Timing Mode

0

Mode 0 (1-Wait KR)

1

Mode 1

0

Mode 2

1

Mode 3 (KR)

BW1

0

0

1

1

BW0

0

1

0

1

Bus Width

ILLEGAL

16-Bit Only

8-Bit Only

BW Pin Controlled

Mode 0

(1-Wait KR):

Designed to be similar to the 87C196KR bus timing with 1 automatic wait state.

See AC Timings section for actual timings data.

Mode 3 (KR): Designed to be similar to the 87C196KR bus timing.

See AC Timings section for actual timings data.

10

ADVANCE INFORMATION Datasheet

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