STV7710BMP データシートの表示（PDF） - STMicroelectronics
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STV7710BMP Datasheet PDF : 21 Pages
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STV7710
Circuit description
4.3
Description
STV7710 includes all the logic and power circuits necessary to drive electrodes of a vacuum
fluorescent display (VFD). Binary values of each pixel of the displayed line are loaded into
the shift register DATA_A/B data bus. Data is shifted at each low to high transition of the CLK
clock. After 96 shifts, the data is available at the output of the shift register. This output can
be used to cascade several Ics to drive higher resolution displays.
The forward /reverse (F/R) input is used to select the direction of the shift register. Data
input/output status is set according to the selected direction (refer to Table 6).
The maximum frequency of the shift clock is 40MHz.
When the STB signal is high, data are transferred from the shift register to the latch and
power output stages.
All the output data are kept memorized and held in the latch stage when the latch input STB
is set at low level.
Vsssub and Vsslog must be connected as close as possible to the logical reference ground
of the application. Also, make sure that TEST input pin is connected to ground (Figure 8).
STV7710 is supplied with a 5 V power supply. All the logic inputs can be driven either by 5 V
CMOS logic, or by 3.3 V CMOS logic.
Table 7. Shift register truth table
Input
Data-in / data-out
F/R
CLK
DATA_A
DATA_B
H
↑
Data-in
Data-out
H
H or L
-
-
L
↑
Data-out
Data-in
L
H or L
-
-
Shift register function
Forward shift
Steady
Reverse shift
Steady
Table 8.
TEST
L
L
L
L
L
Power output truth table
Qn
STB
BLK
POC
X
X
H
X
X
X
L
L
X
L
L
H
L
H
L
H
H
H
L
H
Driver output
all “Low”
all “High”
Qn
L
H
Comments
Output at low level
Output at high level
Data latched
Data transfered
Data transfered
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