T431616B データシートの表示（PDF） - Taiwan Memory Technology

部品番号

コンポーネント説明

メーカー

T431616B

1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM

Taiwan Memory Technology 

tm TE

CH

T431616B

Page Read Cycle at Different Bank @ Burst Length = 4

0

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19

CLOCK

CKE

CS

*Note1

HIGH

RAS

CAS

*Note2

ADDR

RAa

CAa RBb

CBb

CAc

CBd

CAe

BA

A10/AP

RAa

RBb

CL=2

DQ

CL=3

QAa0 QAa1 QAa2 QAa3 QBb0 QBb1 QBb2 QBb3 QAc0 QAc1 QBd0 QBd1 QAe0 QAe1

QAa0 QAa1 QAa2 QAa3 QBb0 QBb1 QBb2 QBb3 QAc0 QAc1 QBd0 QBd1 QAe0 QAe1

WE

DQM

Row Active

(A-Bank)

Read (A-

Bank)

Row Active

(B-Bank)

Read (B-

Bank)

Read (A-

Bank)

Read (B-

Bank)

Read (A-

Bank)

Precharge

(A-Bank)

:Don't care

*Note : 1. CS can be don’t cared when RAS , CAS and WE are high at the clock high going edge.

2. To interrupt a burst resd by row precharge, both the read and the precharge banks must be the same.

Taiwan Memory Technology, Inc. reserves the right P.19

to change products or specifications without notice.

Publication Date: JUL. 2001

Revision:A

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