M80C186 データシートの表示（PDF） - Intel

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M80C186

CHMOS HIGH INTEGRATION 16-BIT MICROPROCESSOR

Intel 

M80C186

CONDITIONAL TRANSFERS

JA JNBE

Jump if above not below nor equal

JAE JNB

Jump if above or equal not below

JB JNAE

Jump if below not above nor equal

JBE JNA

Jump if below or equal not above

JC

Jump if carry

JE JZ

Jump if equal zero

JG JNLE

Jump if greater not less nor equal

JGE JNL

Jump if greater or equal not less

JL JNGE

Jump if less not greater nor equal

JLE JNG

Jump if less or equal not greater

JNC

Jump if not carry

JNE JNZ

Jump if not equal not zero

JNO

Jump if not overflow

JNP JPO

Jump if not parity parity odd

JNS

Jump if not sign

JO

Jump if overflow

JP JPE

Jump if parity parity even

JS

Jump if sign

UNCONDITIONAL TRANSFERS

CALL

Call procedure

RET

Return from procedure

JMP

Jump

ITERATION CONTROLS

LOOP

Loop

LOOPE LOOPZ

Loop if equal zero

LOOPNE LOOPNZ

Loop if not equal not zero

JCXZ

Jump if register CX e 0

INTERRUPTS

INT

Interrupt

INTO

Interrupt if overflow

IRET

Interrupt return

Figure 4 M80C186 Instruction Set (Continued)

To access operands that do not reside in one of the

four immediately available segments a full 32-bit

pointer can be used to reload both the base (seg-

ment) and offset values

270500 –5

Figure 5 Two Component Address

Table 3 Segment Register Selection Rules

Memory Segment

Reference Register

Needed

Used

Implicit Segment

Selection Rule

Instructions Code (CS) Instruction prefetch and

immediate data

Stack

Stack (SS) All stack pushes and

pops any memory

references which use BP

Register as a base

register

External Extra (ES) All string instruction

Data

references which use

(Global)

the DI register as an

index

Local Data Data (DS) All other data references

270500 – 6

Figure 6 Segmented Memory Helps

Structure Software

13

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