µPD75212A
5.9 POWER-ON FLAG (MASK OPTION)
The power-on flag (PONF) is automatically set (1) when the power-on reset circuit is activated and the power-
on reset signal is generated (See Fig. 8-1 Reset Signal Generator).
The PONF is mapped at bit 0 of address FD1H in the data memory space and can be tested by the memory bit
manipulation instructions (SKT, SKF, SKTCLR) or cleared (CLR1).
Note The PONF cannot be set by SET1 instruction.
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