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W742C814 データシートの表示(PDF) - Winbond

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W742C814
Winbond
Winbond Winbond
W742C814 Datasheet PDF : 46 Pages
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W742C814
Bit 0 = 0 The internal fundamental frequency of Timer 1 is FOSC.
= 1 The internal fundamental frequency of Timer 1 is FOSC/64.
Bit 1 = 0 The fundamental frequency source of Timer 1 is the internal clock.
= 1 The fundamental frequency source of Timer 1 is the Fslow-oscillator frequency Fslow
(32768 Hz).
Bit 2 is reserved.
Bit 3 = 0 Timer 1 stops down-counting.
= 1 Timer 1 starts down-counting.
MFP control pin is organized as a 4-bit binary register.
32
BUZCR
10
W
Note: W means write only.
Bit 0 = 0 The specified waveform of the MFP generator is delivered to the MFP output pin.
= 1 The specified frequency of Timer 1 is delivered to the MFP output pin.
Bit 1, Bit 2 & Bit 3 are reserved.
6.12 Interrupts
The W742C814 provides four internal interrupt sources (Divider 0, Divider 1, Timer 0, Timer 1) and
one external interrupt source (port RC). Vector addresses for each of the interrupts are located in the
range of program memory (ROM) addresses 004H to 020H. The flags IEF, PEF, and EVF are used to
control the interrupts. When EVF is set to "1" by hardware and the corresponding bits of IEF and PEF
have been set by software, an interrupt is generated. When an interrupt occurs, all of the interrupts
are inhibited until the EN INT or MOV IEF,#I instruction is invoked. The interrupts can also be disabled
by executing the DIS INT instruction. When an interrupt is generated in hold mode, the hold mode will
be released momentarily and interrupt subroutine will be executed. After the RTN instruction is
executed in an interrupt subroutine, the µC will enter hold mode again. The operation flow chart is
shown in Figure 6-9. The control diagram is shown in Figure 6-8.
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Publication Release Date: February 12, 2003
Revision A2

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