HM6P5331 データシートの表示（PDF） - Hynix Semiconductor

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HM6P5331

2.0GHz/500MHz Dual Frequency Synthesizer

Hynix Semiconductor 

PRELIMINARY

Phase Detector Polarity

Depending upon VCO characteristics, R16 bit should be

set accordingly:

When VCO characteristics are positive like (1), R16

should be set HIGH; When VCO characteristics are

negative like (2), R16 should be set LOW.

  





 



Serial Data Input Timing



 
 

&'& ,-. 

,-. 

()
*





  



,(-.


,(-.




(+

)







(+








NOTES:

1. Parenthesis data indicates programmable reference divider data.

2. Data shifted into register on clock rising edge.

3. Data is shifted in MSB first.

Test Conditions: The Serial Data Input Timing is tested using a symmetrical waveform around VDD/2. The test waveform

has an edge rate of 0.6V/ns with amplitudes of 2.2V at VDD = 2.7V and 2.6V at VDD = 3.6V.

Phase Comparator and Internal Charge Pump Characteristics

"

"

(



"/"



"0"





"1"



"1"



"1"

NOTES:

1. Phase difference detection range: -2to +2

2. The minimum width pump up and pump down current pulse occur at the DO pin when the loop is locked.

3. R16 = HIGH



                                               




















































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