M29F200BB データシートの表示（PDF） - Micron Technology

部品番号

コンポーネント説明

メーカー

M29F200BB

2 Mbit 256Kb x8 or 128Kb x16 / Boot Block Single Supply Flash Memory

Micron Technology 

Status register

5

Status register

M29F200BT, M29F200BB

Bus Read operations from any address always read the Status Register during Program and

Erase operations. It is also read during Erase Suspend when an address within a block

being erased is accessed.

The bits in the Status Register are summarized in Table 7: Status Register Bits.

5.1

Data Polling Bit (DQ7)

The Data Polling Bit can be used to identify whether the Program/Erase Controller has

successfully completed its operation or if it has responded to an Erase Suspend. The Data

Polling Bit is output on DQ7 when the Status Register is read.

During Program operations the Data Polling Bit outputs the complement of the bit being

programmed to DQ7. After successful completion of the Program operation the memory

returns to Read mode and Bus Read operations from the address just programmed output

DQ7, not its complement.

During Erase operations the Data Polling Bit outputs ’0’, the complement of the erased state

of DQ7. After successful completion of the Erase operation the memory returns to Read

Mode.

In Erase Suspend mode the Data Polling Bit will output a ’1’ during a Bus Read operation

within a block being erased. The Data Polling Bit will change from a ’0’ to a ’1’ when the

Program/Erase Controller has suspended the Erase operation.

Figure 4: Data polling flowchart, gives an example of how to use the Data Polling Bit. A Valid

Address is the address being programmed or an address within the block being erased.

5.2

Toggle Bit (DQ6)

The Toggle Bit can be used to identify whether the Program/Erase Controller has

successfully completed its operation or if it has responded to an Erase Suspend. The Toggle

Bit is output on DQ6 when the Status Register is read.

During Program and Erase operations the Toggle Bit changes from ’0’ to ’1’ to ’0’, etc., with

successive Bus Read operations at any address. After successful completion of the

operation the memory returns to Read mode.

During Erase Suspend mode the Toggle Bit will output when addressing a cell within a block

being erased. The Toggle Bit will stop toggling when the Program/Erase Controller has

suspended the Erase operation.

Figure 5: Data toggle flowchart, gives an example of how to use the Data Toggle Bit.

5.3

Error Bit (DQ5)

The Error Bit can be used to identify errors detected by the Program/Erase Controller. The

Error Bit is set to ’1’ when a Program, Block Erase or Chip Erase operation fails to write the

correct data to the memory. If the Error Bit is set a Read/Reset command must be issued

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