M29F200BB データシートの表示（PDF） - Micron Technology

部品番号

コンポーネント説明

メーカー

M29F200BB

2 Mbit 256Kb x8 or 128Kb x16 / Boot Block Single Supply Flash Memory

Micron Technology 

M29F200BT, M29F200BB

Status register

before other commands are issued. The Error bit is output on DQ5 when the Status Register

is read.

Note that the Program command cannot change a bit set at ’0’ back to ’1’ and attempting to

do so may or may not set DQ5 at ‘1’. In both cases, a successive Bus Read operation will

show the bit is still ’0’. One of the Erase commands must be used to set all the bits in a block

or in the whole memory from ’0’ to ’1’.

5.4

Erase Timer Bit (DQ3)

The Erase Timer Bit can be used to identify the start of Program/Erase Controller operation

during a Block Erase command. Once the Program/Erase Controller starts erasing the

Erase Timer Bit is set to ’1’. Before the Program/Erase Controller starts the Erase Timer Bit

is set to ’0’ and additional blocks to be erased may be written to the Command Interface.

The Erase Timer Bit is output on DQ3 when the Status Register is read.

5.5

Alternative Toggle Bit (DQ2)

The Alternative Toggle Bit can be used to monitor the Program/Erase controller during

Erase operations. The Alternative Toggle Bit is output on DQ2 when the Status Register is

read.

During Chip Erase and Block Erase operations the Toggle Bit changes from ’0’ to ’1’ to ’0’,

etc., with successive Bus Read operations from addresses within the blocks being erased.

Once the operation completes the memory returns to Read mode.

During Erase Suspend the Alternative Toggle Bit changes from ’0’ to ’1’ to ’0’, etc. with

successive Bus Read operations from addresses within the blocks being erased. Bus Read

operations to addresses within blocks not being erased will output the memory cell data as if

in Read mode.

After an Erase operation that causes the Error Bit to be set the Alternative Toggle Bit can be

used to identify which block or blocks have caused the error. The Alternative Toggle Bit

changes from ’0’ to ’1’ to ’0’, etc. with successive Bus Read Operations from addresses

within blocks that have not erased correctly. The Alternative Toggle Bit does not change if

the addressed block has erased correctly.

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