M80C286 データシートの表示（PDF） - Intel
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M80C286 Datasheet PDF : 60 Pages
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M80C286
ABSOLUTE MAXIMUM RATINGS
Case Temperature under Bias
Storage Temperature
Voltage on Any Pin with
Respect to Ground
Power Dissipation
b55 C to a125 C
b65 C toa150 C
b1 0V to a7V
1 1W
NOTICE This data sheet contains information on
products in the sampling and initial production phases
of development The specifications are subject to
change without notice Verify with your local Intel
Sales office that you have the latest data sheet be-
fore finalizing a design
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
Operating Conditions
Symbol
Description
TC
Case Temperature (Instant On)
VCC
Digital Supply Voltage
Min
b55
4 50
Max
a125
5 50
Units
C
V
D C CHARACTERISTICS Over Specified Operating Conditions
Symbol
Parameter
Min
Max Unit
ICC
ICCS
CCLK
CIN
CO
VIL
VIH
VILC
VIHC
VOL
VOH
ILI
ILO
IIL
Supply Current
200
mA
Supply Current (Static)
5
mA
CLK Input Capacitance
20
pF
Other Input Capacitance
10
pF
Input Output Capacitance
20
pF
Input LOW Voltage
b0 5
08
V
Input HIGH Voltage
CLK Input LOW Voltage
20
b0 5
VCC a 0 5 V
08
V
CLK Input HIGH Voltage
Output LOW Voltage
38
VCC a 0 5 V
0 45
V
Output HIGH Voltage
Input Leakage Current
30
V
VCC b 0 5
V
g10
mA
Output Leakage Current
g10
mA
Input Sustaining Current on
BUSY and ERROR Pins
b30
b500 mA
IBHL
Input Sustaining Current
35
200
mA
(Bus Hold LOW)
IBHH
Input Sustaining Current
(Bus Hold HIGH)
b50
b400 mA
IBHLO Bus Hold LOW Overdrive
250
mA
IBHHO Bus Hold HIGH Overdrive
b420
mA
Comments
CL e 100 pF (Note 6)
(Note 7)
FREQ e 1 MHz
FREQ e 1 MHz
FREQ e 1 MHz
FREQ e 2 MHz
FREQ e 2 MHz
FREQ e 2 MHz
FREQ e 2 MHz
IOL e 2 0 mA FREQ e 2 MHz
IOH e b2 0 mA FREQ e 2 MHz
IOH e b100 mA FREQ e 2 MHz
VIN e GND or VCC (Note 6)
VO e GND or VCC (Note 1)
VIN e 0V (Note 1)
VIN e 1 0V (Notes 1 2)
VIN e 3 0V (Notes 1 3)
(Notes 1 4)
(Notes 1 5)
NOTES
1 Tested with the clock stopped
2 IBHL should be measured after lowering VIN to GND and then raising to 1 0V on the following pins 36 – 51 66 67
3 IBHH should be measured after raising VIN to VCC and then lowering to 3 0V on the following pins 4 – 6 36 – 51 66 – 68
4 An external driver must source at least IBHLO to switch this node from LOW to HIGH
5 An external driver must sink at least IBHHO to switch this node from HIGH to LOW
6 Tested with outputs unloaded and at maximum frequency
7 Tested while clock stopped in phase 2 and inputs at VCC or VSS with the outputs unloaded
41
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