DAC1005D650HW/C1 データシートの表示（PDF） - NXP Semiconductors.

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DAC1005D650HW/C1

Dual 10-bit DAC, up to 650 Msps; 2×4×and 8×interpolating

NXP Semiconductors. 

NXP Semiconductors

6. Pinning information

6.1 Pinning

DAC1005D650

Dual 10-bit DAC, up to 650 Msps; 2× 4× and 8× interpolating

VDDA(3V3) 1

AUXAP 2

AUXAN 3

AGND 4

VDDA(1V8) 5

VDDA(1V8) 6

AGND 7

CLKP 8

CLKN 9

AGND 10

VDDA(1V8) 11

d.n.c. 12

d.n.c. 13

TM1 14

TM0 15

VDD(IO)(3V3) 16

GNDIO 17

I9 18

I8 19

I7 20

I6 21

I5 22

I4 23

I3 24

I2 25

Fig 2. Pin configuration

DAC1005D650HW

AGND

75 VDDA(3V3)

74 AUXBP

73 AUXBN

72 AGND

71 VDDA(1V8)

70 VDDA(1V8)

69 GAPOUT

68 VIRES

67 d.n.c.

66 RESET_N

65 SCS_N

64 SCLK

63 SDIO

62 SDO

61 TM3

60 VDD(IO)(3V3)

59 GNDIO

58 n.c.

57 n.c.

56 n.c.

55 n.c.

54 Q0

53 Q1

52 Q2

51 Q3

001aak159

DAC1005D650

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 3 September 2010

© NXP B.V. 2010. All rights reserved.

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