AM29F200BB-70 データシートの表示（PDF） - Advanced Micro Devices

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AM29F200BB-70

2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory

Advanced Micro Devices 

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 9

Table 1. Am29F200B Device Bus Operations ..................................9

Word/Byte Configuration .......................................................... 9

Requirements for Reading Array Data ..................................... 9

Writing Commands/Command Sequences .............................. 9

Program and Erase Operation Status .................................... 10

Standby Mode ........................................................................ 10

RESET#: Hardware Reset Pin ............................................... 10

Output Disable Mode .............................................................. 10

Table 2. Am29F200T Top Boot Block Sector Address Table .........11

Table 3. Am29F200B Bottom Boot Block Sector Address Table ....11

Autoselect Mode ..................................................................... 11

Table 4. Am29F200B Autoselect Codes (High Voltage Method) ....12

Sector Protection/Unprotection ............................................... 12

Temporary Sector Unprotect .................................................. 12

Figure 1. Temporary Sector Unprotect Operation........................... 12

Hardware Data Protection ...................................................... 12

Low VCC Write Inhibit ......................................................................13

Write Pulse “Glitch” Protection ........................................................13

Logical Inhibit ..................................................................................13

Power-Up Write Inhibit ....................................................................13

Command Definitions . . . . . . . . . . . . . . . . . . . . . 13

Reading Array Data ................................................................ 13

Reset Command ..................................................................... 13

Autoselect Command Sequence ............................................ 13

Word/Byte Program Command Sequence ............................. 14

Figure 2. Program Operation .......................................................... 14

Chip Erase Command Sequence ........................................... 14

Sector Erase Command Sequence ........................................ 15

Erase Suspend/Erase Resume Commands ........................... 15

Figure 3. Erase Operation............................................................... 16

Command Definitions ............................................................. 17

Table 5. Am29F200B Command Definitions ...................................17

DQ7: Data# Polling ................................................................. 18

Figure 4. Data# Polling Algorithm ................................................... 18

RY/BY#: Ready/Busy# ........................................................... 19

DQ6: Toggle Bit I .................................................................... 19

DQ2: Toggle Bit II ................................................................... 19

Reading Toggle Bits DQ6/DQ2 .............................................. 19

DQ5: Exceeded Timing Limits ................................................ 20

DQ3: Sector Erase Timer ....................................................... 20

Figure 5. Toggle Bit Algorithm........................................................ 20

Table 6. Write Operation Status ..................................................... 21

Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 22

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 22

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23

TTL/NMOS Compatible .......................................................... 23

CMOS Compatible .................................................................. 24

Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 8. Test Setup....................................................................... 25

Table 7. Test Specifications ........................................................... 25

Key to Switching Waveforms. . . . . . . . . . . . . . . . 25

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26

Read Operations .................................................................... 26

Figure 9. Read Operations Timings ............................................... 26

Hardware Reset (RESET#) .................................................... 27

Figure 10. RESET# Timings .......................................................... 27

Word/Byte Configuration (BYTE#) ...................................... 28

Figure 11. BYTE# Timings for Read Operations............................ 28

Figure 12. BYTE# Timings for Write Operations............................ 28

Erase/Program Operations ..................................................... 29

Figure 13. Program Operation Timings.......................................... 30

Figure 14. Chip/Sector Erase Operation Timings .......................... 31

Figure 15. Data# Polling Timings (During Embedded Algorithms). 32

Figure 16. Toggle Bit Timings (During Embedded Algorithms)...... 32

Figure 17. DQ2 vs. DQ6................................................................. 33

Temporary Sector Unprotect .................................................. 33

Figure 18. Temporary Sector Unprotect Timing Diagram .............. 33

Alternate CE# Controlled Erase/Program Operations ............ 34

Figure 19. Alternate CE# Controlled Write Operation Timings ...... 35

Erase and Programming Performance . . . . . . . . 36

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 36

TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 36

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 37

SO 044—44-Pin Small Outline Package ................................ 37

TS 048—48-Pin Standard Thin Small Outline Package ......... 38

TSR048—48-Pin Reverse Thin Small Outline Package ......... 39

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 40

Revision A (July 1998) ............................................................ 40

Revision B (January 1999) ..................................................... 40

Revision B+1 (April 12, 1999) ................................................. 40

Revision B+2 (July 2, 1999) .................................................... 40

Revision C (November 12, 1999) ........................................... 40

Revision D (November 29, 2000) ........................................... 40

Am29F200B

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