IDT72420L12TP データシートの表示（PDF） - Integrated Device Technology

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IDT72420L12TP

CMOS SyncFIFO™ 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8

Integrated Device Technology 

IDT72420/72200/72210/72220/72230/72240 CMOS SyncFIFO™

64 X 8, 256 X 8, 512 X 8, 1024 X 8, 2048 X 8 and 4096 X 8

MILITARY AND COMMERCIAL TEMPERATURE RANGES

OPERATING CONFIGURATIONS

SINGLE DEVICE CONFIGURATION - A single IDT72420/ application requirements are for 64/256/512/1024/2048/4096

72200/72210/72220/72230/72240 may be used when the words or less. See Figure 10.

RESET (RS)

WRITE CLOCK (WCLK)

WRITE ENABLE (WEN)

DATA IN (D0-D7)

FULL FLAG (FF)

ALMOST FULL (AF)

IDT

72420/72200/

72210/

72220/

72230/

72240

READ CLOCK (RCLK)

READ ENABLE (REN)

OUTPUT ENABLE (OE)

DATA OUT (Q0- Q7)

EMPTY FLAG (EF)

ALMOST EMPTY(AE)

Figure 10. Block Diagram of Single 64 x 8/256 x 8/512 x 8/1024 x 8/2048 x 8/4096 x 8 Synchronous FIFO

2680 drw 12

WIDTH EXPANSION CONFIGURATION - Word width may

be increased simply by connecting the corresponding input

control signals of multiple devices. A composite flag should be

created for each of the end-point status flags (EF and FF) The

partial status flags (AE and AF) can be detected from any one

device. Figure 11 demonstrates a 16-bit word width by using

two IDT72420/72200/72210/72220/72230/72240s. Any word

width can be attained by adding additional IDT72420/72200/

72210/72220/72230/72240s.

RESET (RS)

RESET (RS)

DATA IN (D) 16

8

WRITE CLOCK (WCLK)

WRITE ENABLE (WEN)

ALMOST FULL (AF)

FULL FLAG (FF) #1

FULL FLAG (FF) #2

IDT

72420/

72200/

72210/

72220/

72230/

72240

8

8

IDT

72420/

72200/

72210/

72220/

72230/

72240

READ CLOCK (RCLK)

READ ENABLE (REN)

OUTPUT ENABLE (OE)

ALMOST EMPTY (AE)

EMPTY FLAG (EF) #1

EMPTY FLAG (EF) #2

8 DATA OUT (Q) 16

2680 drw 13

Figure 11. Block Diagram of 64 x 16/256 x 16/512 x 16/1024 x 16/2048 x 16/4096 x 16 Synchronous FIFO

Used in a Width Expansion Configuration

5.12

15

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