FAN8060 データシートの表示（PDF） - ON Semiconductor
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FAN8060 Datasheet PDF : 14 Pages
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Applications Information
Refer to Figure 1 for reference designators.
Output Voltage Setting
The output voltage of the FAN8060 can be set from
1.2 V to VIN by an external resistor divider, given by the
following equation:
VOUT
= 1.2(1+ R2 )
R3
(2)
where, VOUT equals the output voltage.
Inductor Selection
Typically, the inductor value is chosen based on ripple
current (∆IL), which is chosen between 10% and 35% of
the maximum DC load. Regulator designs that require
fast transient response use a higher ripple-current
setting, while regulator designs that require higher
efficiency keep ripple current on the low side and
operate at a lower switching frequency.
For a given output voltage ripple requirement, L can be
calculated by the following equation:
L ≥ VOUT ⋅ (1− D)
∆IL ⋅ fS
(3)
where;
D = Duty ratio (VO/VIN);
fS = Switching frequency; and
∆IL = Inductor ripple value, typically set to 10% -
35% of the maximum steady-state load current.
The inductor should have a low DCR to minimize the
conduction losses and maximize efficiency. Some
recommended inductors are suggested in Table 1:
Table 1. Recommended Inductors (3.3 µH)
Size[mm2] DCR
Part Number
7x7x3
23 mΩ SLF7032T-3R3
5x5x2
60 mΩ LTF5022T-3R3
4x4x2
78 mΩ VLCF4020T-3R3
2.6x2.8x1.2 130 mΩ VLF3012AT-3R3
Vendor
TDK
TDK
TDK
TDK
Output Capacitor Selection
The output capacitor is selected based on the needs of
the final application and its output ripple requirements.
A larger output capacitor value reduces the output
ripple voltage. The formula of output ripple ΔVOUT is:
∆VOUT
≅
∆IL ESR
+
8
1
⋅ COUT
⋅ fS
(4)
where COUT is the output capacitor.
ESR is the equivalent series resistance of the output
capacitor.
Input Capacitor Selection
The input capacitor reduces the RMS current drawn
from the input and switching noise from the device. The
combined RMS current rating for the input capacitor
should be greater than the value calculated by the
following equation:
IRMS = IOUTMAX ⋅ ( D − D2 )
(5)
where:
IRMS = RMS current of the input capacitor; and
IOUTMAX = Maximum output current.
Small, high value, inexpensive, lower-ESR ceramic
capacitors are recommended; 10 µF ceramic
capacitors with X7R or X5R should be adequate for
1 A applications.
Loop Compensation
The loop is compensated using a feedback network
connected between COMP and AGND. Figure 14
shows a Type-2 compensation network used to
stabilize the FAN8060.
Vout
R2
- VFB
R3
Gm
+
RC
CC
Vref
Ve
CA
Figure 14. Compensation Network
The goal of the compensation design is to shape the
frequency response of the converter to achieve high
DC gain and fast transient, while maintaining loop
stability. FAN8060 employs peak-current-mode control
for easy use and fast transient response. Current mode
control helps simplify the loop to a one-pole and one
zero system.
The DC gain of the voltage feedback loop is given by:
AVDC
=
RL
⋅ GCS
⋅ AVEA
⋅ VFB
VOUT
(6)
where:
AVDC = DC gain of the feedback loop;
RL = Load resistor value (VOUT/IOUT);
GCS = Current sense gain (3 A/V);
AVEA = Error amplifier voltage gain (550 V/V); and
VFB = Feedback threshold voltage (1.2 V).
© 2013 Fairchild Semiconductor Corporation
FAN8060 • Rev. 1.0.1
9
www.fairchildsemi.com
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