A42MX36-PG100A データシートの表示（PDF） - Microsemi Corporation

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A42MX36-PG100A

40MX and 42MX FPGA

Microsemi Corporation 

40MX and 42MX FPGAs

Figure 5 • A42MX24 and A42MX36 D-Module Implementation

7 Inputs

Hard-Wire to I/O

Programmable

Inverter

Feedback to Array

Figure 6 • A42MX36 Dual-Port SRAM Block

WD[7:0]

Latches

[7:0]

WRAD[5:0]

Latches

[5:0]

Write SRAM Module Read

Port 32 x 8 or 64 x 4 Port

[5:0] Logic (256 Bits)

Logic

RDAD[5:0]

Latches

Read

Logic

REN

3.2.3

3.2.3.1

3.2.3.2

MODE

BLKEN

WEN

WCLK

Write

Logic

RD[7:0]

Routing Tracks

RCLK

Routing Structure

The MX architecture uses vertical and horizontal routing tracks to interconnect the various logic and I/O

modules. These routing tracks are metal interconnects that may be continuous or split into segments.

Varying segment lengths allow the interconnect of over 90% of design tracks to occur with only two

antifuse connections. Segments can be joined together at the ends using antifuses to increase their

lengths up to the full length of the track. All interconnects can be accomplished with a maximum of four

antifuses.

Horizontal Routing

Horizontal routing tracks span the whole row length or are divided into multiple segments and are located

in between the rows of modules. Any segment that spans more than one-third of the row length is

considered a long horizontal segment. A typical channel is shown in Figure 7, page 12. Within horizontal

routing, dedicated routing tracks are used for global clock networks and for power and ground tie-off

tracks. Non-dedicated tracks are used for signal nets.

Vertical Routing

Another set of routing tracks run vertically through the module. There are three types of vertical tracks:

input, output, and long. Long tracks span the column length of the module, and can be divided into

multiple segments. Each segment in an input track is dedicated to the input of a particular module; each

segment in an output track is dedicated to the output of a particular module. Long segments are

uncommitted and can be assigned during routing.

Each output segment spans four channels (two above and two below), except near the top and bottom of

the array, where edge effects occur. Long vertical tracks contain either one or two segments. An example

of vertical routing tracks and segments is shown in Figure 7, page 12.

DS2316 Datasheet Revision 16.0

11

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