MT46V128M4 データシートの表示（PDF） - Micron Technology

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MT46V128M4

Double Data Rate (DDR) SDRAM

Micron Technology 

512Mb: x4, x8, x16 DDR SDRAM

Pin and Ball Assignments and Descriptions

Table 4: Pin and Ball Descriptions (continued)

FBGA

Numbers

E3

E7

E3

TSOP

Numbers

51

16

51

F8, M7, A7

B2, D2, C8,

E8, A9

F1

A3, F2, M3

A1, C2, E2,

B8, D8

–

B1, B9, C1,

C9, D1, D9,

E1, E7, E9,

F7

B1, B9, C1,

C9, D1, D9,

E1, E7, E9,

F7

A2, A8, C3,

C7

F9

1, 18, 33

3, 9, 15, 55,

61

49

34, 48, 66

6, 12, 52,

58, 64

14, 17, 25,

43, 53

4, 7, 10,

13, 14, 16,

17, 20, 25,

43, 53, 54,

57, 60, 63

4, 7, 10, 13,

14, 16, 17,

20, 25, 43,

53, 54, 57,

60, 63

2, 8, 59, 65

19, 50

Symbol

DQS

LDQS

UDQS

VDD

VDDQ

VREF

VSS

VSSQ

NC

NC

NC

NF

DNU

Type Description

I/O Data strobe: Output with read data, input with write data. DQS is edge-

aligned with read data, centered in write data. It is used to capture data.

For the x16, LDQS is DQS for DQ0–DQ7 and UDQS is DQS for DQ8–DQ15.

Pin 16 (E7) is NC on x4 and x8.

Supply Power supply: +2.5V ±0.2V. (+2.6V ±0.1V for DDR400).

Supply DQ power supply: +2.5V ±0.2V (+2.6V ±0.1V for DDR400). Isolated on

the die for improved noise immunity.

Supply SSTL_2 reference voltage.

Supply Ground.

Supply DQ ground: Isolated on the die for improved noise immunity.

– No connect for x16: These pins should be left unconnected.

– No connect for x8: These pins should be left unconnected.

– No connect for x4: These pins should be left unconnected.

– No function for x4: These pins should be left unconnected.

– Do not use: Must float to minimize noise on VREF.

Table 5:

Reserved NC Pin and Ball Descriptions

NC pins not listed may also be reserved for other uses; this table defines NC pins of importance

TSOP

Numbers

17

Symbol

A13

Type

Input

Description

Address input A13 for 1Gb devices.

PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a

512Mb_DDR_x4x8x16_D2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN

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