LTC1668IG データシートの表示（PDF） - Linear Technology

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LTC1668IG

12-Bit, 14-Bit, 16-Bit, 50Msps DACs

Linear Technology 

LTC1666/LTC1667/LTC1668

APPLICATIO S I FOR ATIO

Theory of Operation

The LTC1666/LTC1667/LTC1668 are high speed current

steering 12-/14-/16-bit DACs made on an advanced

BiCMOS process. Precision thin film resistors and well

matched bipolar transistors result in excellent DC linearity

and stability. A low glitch current switching design gives

excellent AC performance at sample rates up to 50Msps.

The devices are complete with a 2.5V internal bandgap

reference and edge triggered latches, and set a new

standard for DAC applications requiring very high dy-

namic range at output frequencies up to several mega-

hertz.

Referring to the Block Diagrams, the DACs contain an

array of current sources that are steered to IOUTA or IOUTB

with NMOS differential current switches. The four most

significant bits are made up of 15 current segments of

equal weight. The remaining lower bits are binary weighted,

using a combination of current scaling and a differential

resistive attenuator ladder. All bits and segments are

precisely matched, both in current weight for DC linearity,

and in switch timing for low glitch impulse and low

spurious tone AC performance.

Setting the Full-Scale Current, IOUTFS

The full-scale DAC output current, IOUTFS, is nominally

10mA, and can be adjusted down to 1mA. Placing a

resistor, RSET, between the REFOUT pin, and the IREFIN pin

sets IOUTFS as follows.

The internal reference control loop amplifier maintains a

virtual ground at IREFIN by servoing the internal current

source, IINT, to sink the exact current flowing into IREFIN.

IINT is a scaled replica of the DAC current sources and

IOUTFS = 8 • (IINT), therefore:

IOUTFS = 8 • (IREFIN) = 8 • (VREF/RSET)

(1)

For example, if RSET = 2k and is tied to VREF = REFOUT =

2.5V, IREFIN = 2.5/2k = 1.25mA and IOUTFS = 8 • (1.25mA)

= 10mA.

The reference control loop requires a capacitor on the

COMP1 pin for compensation. For optimal AC perfor-

mance, CCOMP1 should be connected to VSS and be placed

very close to the package (less than 0.1").

For fixed reference voltage applications, CCOMP1 should

be 0.1µF or more. The reference control loop small-signal

bandwidth is approximately 1/(2π) • CCOMP1 • 80 or 20kHz

for CCOMP1 = 0.1µF.

Reference Operation

The onboard 2.5V bandgap voltage reference drives the

REFOUT pin. It is trimmed and specified to drive a 2k

resistor tied from REFOUT to IREFIN, corresponding to a

1.25mA load (IOUTFS = 10mA). REFOUT has nominal

output impedance of 6Ω, or 0.24% per mA, so it must be

buffered to drive any additional external load. A 0.1µF

capacitor is required on the REFOUT pin for compensa-

tion. Note that this capacitor is required for stability, even

if the internal reference is not being used.

External Reference Operation

Figure 1, shows how to use an external reference to control

the LTC1666/LTC1667/LTC1668 full-scale current.

REFOUT

2.5V

REFERENCE

5V

0.1µF

LTC1666/

EXTERNAL

IREFIN

LTC1667/

LTC1668

REFERENCE

RSET

+

–

1666/7/8 F02

Figure 1. Using the LTC1666/LTC1667/LTC1668

with an External Reference

11

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