BCM2835 データシートの表示（PDF） - Broadcom Corporation
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BCM2835 Datasheet PDF : 205 Pages
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AUX_MU_LSR_REG Register (0x7E21 5054)
SYNOPSIS The AUX_MU_LSR_REG register shows the data status.
Bit(s) Field Name
31:8
7
6
Transmitter
idle
5
Transmitter
empty
4:2
1
Receiver
Overrun
0
Data ready
Description
Type Reset
Reserved, write zero, read as don’t care
Reserved, write zero, read as don’t care
This bit has a function in a 16550 compatible UART
0
but is ignored here
This bit is set if the transmit FIFO is empty and the R 1
transmitter is idle. (Finished shifting out the last bit).
This bit is set if the transmit FIFO can accept at least R 0
one byte.
Reserved, write zero, read as don’t care
Some of these bits have functions in a 16550
0
compatible UART but are ignored here
This bit is set if there was a receiver overrun. That is: R/C 0
one or more characters arrived whilst the receive
FIFO was full. The newly arrived charters have been
discarded. This bit is cleared each time this register is
read. To do a non-destructive read of this overrun bit
use the Mini Uart Extra Status register.
This bit is set if the receive FIFO holds at least 1
symbol.
R0
AUX_MU_MSR_REG Register (0x7E21 5058)
SYNOPSIS The AUX_MU_MSR_REG register shows the 'modem' status.
Bit(s) Field Name
31:8
7:6
5
CTS status
3:0
Description
Type Reset
Reserved, write zero, read as don’t care
Reserved, write zero, read as don’t care
Some of these bits have functions in a 16550
0
compatible UART but are ignored here
This bit is the inverse of the UART1_CTS input Thus R 1
:
If set the UART1_CTS pin is low
If clear the UART1_CTS pin is high
Reserved, write zero, read as don’t care
Some of these bits have functions in a 16550
0
compatible UART but are ignored here
06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW
© 2012 Broadcom Corporation. All rights reserved
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