BCM2835 データシートの表示（PDF） - Broadcom Corporation
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BCM2835 Datasheet PDF : 205 Pages
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AUX_MU_SCRATCH Register (0x7E21 505C)
SYNOPSIS The AUX_MU_SCRATCH is a single byte storage.
Bit(s) Field Name
31:8
7:0 Scratch
Description
Reserved, write zero, read as don’t care
One whole byte extra on top of the 134217728
provided by the SDC
Type Reset
R/W 0
AUX_MU_CNTL_REG Register (0x7E21 5060)
SYNOPSIS The AUX_MU_CNTL_REG provides access to some extra useful and nice features not
found on a normal 16550 UART .
Bit(s) Field Name
31:8
7
CTS assert
level
6
RTS assert
level
5:4 RTS AUTO
flow level
3
Enable
transmit Auto
flow-control
using CTS
Description
Type Reset
Reserved, write zero, read as don’t care
This bit allows one to invert the CTS auto flow
operation polarity.
If set the CTS auto flow assert level is low*
If clear the CTS auto flow assert level is high*
R/W 0
This bit allows one to invert the RTS auto flow
operation polarity.
If set the RTS auto flow assert level is low*
If clear the RTS auto flow assert level is high*
R/W 0
These two bits specify at what receiver FIFO level the R/W 0
RTS line is de-asserted in auto-flow mode.
00 : De-assert RTS when the receive FIFO has 3
empty spaces left.
01 : De-assert RTS when the receive FIFO has 2
empty spaces left.
10 : De-assert RTS when the receive FIFO has 1
empty space left.
11 : De-assert RTS when the receive FIFO has 4
empty spaces left.
If this bit is set the transmitter will stop if the CTS
line is de-asserted.
R/W 0
If this bit is clear the transmitter will ignore the status
of the CTS line
06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW
© 2012 Broadcom Corporation. All rights reserved
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