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28F128L18 データシートの表示(PDF) - Numonyx -> Micron

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28F128L18 Datasheet PDF : 106 Pages
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Numonyx™ StrataFlash® Wireless Memory (L18)
Table 13: AC Read Specification Table, 1.35 V to 2.0 V (Sheet 2 of 2)
Num
R111
Symbol
tphvh
Parameter
RST# high to ADV# high
All
DensitiesSpeed
–90
Min
30
Max
-
Units Notes
ns
1
Clock Specifications
R200
R201
R202
R203
fCLK
tCLK
tCH/CL
tFCLK/RCLK
CLK frequency
CLK period
CLK high/low time
CLK fall/rise time
Synchronous Specifications
-
21.3
4.5
-
47
MHz
-
ns
1,3
-
ns
3
ns
R301
tAVCH/L
Address setup to CLK
7
-
ns
R302
R303
tVLCH/L
tELCH/L
ADV# low setup to CLK
CE# low setup to CLK
7
-
ns
1
7
-
ns
R304
tCHQV / tCLQV
CLK to output valid
-
17
ns
R305
tCHQX
Output hold from CLK
3
-
ns
1,5
R306
tCHAX
Address hold from CLK
7
-
ns 1,4,5
R307
tCHTV
CLK to WAIT valid
-
17
ns
1,5
R311
tCHVL
CLK Valid to ADV# Setup
0
-
ns
1
R312
tCHTX
WAIT Hold from CLK
3
-
ns
1,5
Notes:
1.
See Figure 8, “AC Input/Output Reference Waveform” on page 26 for timing measurements and max
allowable input slew rate.
2.
OE# may be delayed by up to tELQV – tGLQV after CE#’s falling edge without impact to tELQV.
3.
Sampled, not 100% tested.
4.
Address hold in synchronous burst mode is tCHAX or tVHAX, whichever timing specification is satisfied first.
5.
Applies only to subsequent synchronous reads.
6.
The specifications in this table will only be used by customers (1) who desire a 1.35 to 2.0 VCCQ operating range OR (2)
who desire to transition their host controller from a 1.7 V to 2.0 V VCCQ voltage now to a lower range in the future.
7.4
AC Read Specifications 128-Mbit (VCCQ = 1.7–2.0 V)
Table 14: AC Read Specifications, 128-Mbit, 1.7 V to 2.0 V (Sheet 1 of 2)
Num
Symbol
Parameter
Speed
Asynchronous Specifications
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
tAVAV
tAVQV
tELQV
tGLQV
tPHQV
tELQX
tGLQX
tEHQZ
tGHQZ
tOH
tEHEL
Read cycle time
Address to output valid
CE# low to output valid
OE# low to output valid
RST# high to output valid
CE# low to output in low-Z
OE# low to output in low-Z
CE# high to output in high-Z
OE# high to output in high-Z
Output hold from first occurring address, CE#, or OE# change
CE# pulse width high
–85
Units
Min Max
85
-
ns
-
85
ns
-
85
ns
-
20
ns
-
150
ns
0
-
ns
0
-
ns
-
17
ns
-
17
ns
0
-
ns
14
-
ns
Notes
6
1,2
1
1,3
1,2,3
1,3
1
Datasheet
28
November 2007
251902-12

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