AD9923A データシートの表示（PDF） - Analog Devices

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AD9923A

CCD Signal Processor with V-Driver and Precision Timing Generator

Analog Devices 

HD

HBLK

HL/H1/H3

H1/H3

H2/H4

AD9923A

...

...

THE POLARITY OF HL/H1/H3 DURING BLANKING ARE INDEPENDENTLY PROGRAMMABLE

(H2/H4 IS OPPOSITE POLARITY OF H1/H3).

Figure 27. HBLK Masking Polarity Control

HBLK

HBLKTOGE1

HBLKTOGE2

HBLKTOGE4

HBLKTOGE3

HBLKTOGE6

HBLKTOGE5

HL/H1/H3

H2/H4

SPECIAL H-BLANK PATTERN IS CREATED USING MULTIPLE HBLK TOGGLE POSITIONS (HBLKALT = 0).

Figure 28. Using Multiple Toggle Positions for HBLK (HBLKALT = 0)

Generating HBLK Line Alternation

The AD9923A can alternate different HBLK toggle positions on

odd and even lines. This feature can be used in conjunction with

V-pattern odd/even alternation, or on its own. When 1 is written

to the HBLKALT register, HBLKTOGE1 and HBLKTOGE2 are

used on odd lines, and HBLKTOGE3 to HBLKTOGE6 are used

on even lines. Writing 2 to the HBLKALT register gives the oppo-

site result: HBLKTOGE1 and HBLKTOGE2 are used on even

lines, and HBLKTOGE3 to HBLKTOGE6 are used on odd lines.

When 3 is written to the HBLKALT register, all six even toggle

positions, HBLKTOGE1 to HBLKTOGE6, are used on even

lines. There are also six additional toggle positions, HBLKTOGO1

to HBLKTOGE6, for odd lines. These registers are normally

used for VPAT Group A, VPAT Group B, and freeze/resume

functions, but when HBLKALT = 3, these registers become the

odd line toggle positions for HBLK.

Another HBLK feature is enabled by writing 4, 5, 6, or 7 to

HBLKALT. In these modes, the HBLK pattern is generated using

a different set of registers—HBLKSTART, HBLKEND, HBLKLEN,

and HBLKREP—along with four toggle positions. This allows

for multiple repeats of the HBLK signal, as shown in Figure 32.

Rev. A | Page 21 of 84

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