AD9923A データシートの表示（PDF） - Analog Devices

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AD9923A

CCD Signal Processor with V-Driver and Precision Timing Generator

Analog Devices 

AD9923A

HD

HBLK

HL/H1/H3

H2/H4

ODD LINE

HBLKTOGE1 HBLKTOGE2

EVEN LINE

HBLKTOGE4

HBLKTOGE6

HBLKTOGE3

HBLKTOGE5

ALTERNATING H-BLANK PATTERN USING HBLKALT = 1 MODE.

Figure 29. HBLK Odd/Even Alternation Using HBLKALT = 1

HD

HBLK

HL/H1/H3

H2/H4

HD

HBLK

HL/H1/H3

H2/H4

HBLK

HL/H1/H3

H2/H4

ODD LINE

HBLKTOGE4

HBLKTOGE6

HBLKTOGE3

HBLKTOGE5

EVEN LINE

HBLKTOGE2

HBLKTOGE1

ALTERNATING H-BLANK PATTERN USING HBLKALT = 2 MODE.

Figure 30. HBLK Odd/Even Alternation Using HBLKALT = 2

ODD LINE

HBLKTOGO2

HBLKTOGO4

HBLKTOGO1

HBLKTOGO3

EVEN LINE

HBLKTOGE2

HBLKTOGE4

HBLKTOGE1

HBLKTOGE3

ALTERNATING H-BLANK PATTERN USING HBLKALT = 3 MODE.

(FREEZE/RESUME FUNCTION NOT AVAILABLE IN THIS MODE.)

Figure 31. HBLK Odd/Even Alternation Using HBLKALT = 3

HBLKTOGE2

HBLKTOGE4

HBLKSTART HBLKTOGE1 HBLKTOGE3

HBLKLEN

HBLKREP = 3

HBLKEND

HBLKREP NUMBER 1

HBLKREP NUMBER 2

HBLKREP NUMBER 3

H-BLANK REPEATING PATTERN IS CREATED USING HBLKLEN AND HBLKREP REGISTERS.

Figure 32. HBLK Repeating Pattern Using HBLKALT = 4 to 7

Rev. A | Page 22 of 84

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