ADP3025 データシートの表示（PDF） - Analog Devices

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ADP3025

High Efficiency Dual Output Power Supply Controller

Analog Devices 

ADP3025

THEORY OF OPERATION

The ADP3025 contains two synchronous step-down buck

controllers and a linear regulator controller. The buck control-

lers in the ADP3025 have the ability to provide either fixed

3.3 V and 5 V outputs or independently adjustable (800 mV to

6.0 V) outputs. Efficiency is improved by eliminating the

external current sense resistor, which is the main contributor to

loss during high current, low output voltage conditions.

cross-conduction during switch transitions. The low-side driver

must be turned off before the high-side driver is turned on. For

typical N-channel MOSFETs, the dead time is approximately

50 ns. On the other edge, a dead time of approximately 50 ns is

achieved by an internal delay circuit. In discontinuous conduc-

tion mode (DCM), the synchronous rectifier is turned off when

the current flowing through the low-side MOSFET falls to zero.

In continuous conduction mode (CCM), the current flowing

INTERNAL 5 V SUPPLY (INTVCC)

through the low-side MOSFET never reaches zero, so the

An internal low dropout regulator (LDO) generates a 5 V

supply (INTVCC) that powers all the functional blocks within

the IC. The total current rating of this LDO is 50 mA. However,

this current is used for supplying gate drive power; current

should not be drawn from this pin for other purposes. Bypass

E INTVCC to AGND with a 4.7 µF capacitor. A UVLO circuit is

also included in the regulator. When INTVCC < 4.05 V, the two

switching regulators and the linear regulator controller are shut

down. The UVLO hysteresis voltage is about 300 mV. The

T internal LDO has a built-in foldback current limit so that it is

protected if a short circuit is applied to the 5 V output.

E REFERENCE (REF)

The ADP3025 contains a precision 800 mV reference. Bypass

REF to AGND with a 22 nF ceramic capacitor. The reference is

L intended for internal use only.

BOOSTED HIGH-SIDE GATE DRIVE SUPPLY (BST)

The gate drive voltage for the high-side N-channel MOSFET is

generated by a flying-capacitor boost circuit. The boost capaci-

O tor connected between BST and SW is charged from the

INTVCC supply. Use only small-signal diodes for the boost

circuit.

S SYNCHRONOUS RECTIFIER (DRVL)

Synchronous rectification is used to reduce conduction losses

and ensure proper startup of the boost gate driver circuit.

B Antishoot-through protection has been included to prevent

O Table 4. Operating Modes

synchronous rectifier is turned off by the next clock cycle.

OSCILLATOR FREQUENCY AND

SYNCHRONIZATION (SYNC)

The SYNC pin controls the oscillator frequency. When SYNC =

0 V, fOSC = 200 kHz; when SYNC = 5 V, fOSC = 300 kHz. 300 kHz

operation minimizes external component size and cost; 200 kHz

operation provides better efficiency and lower dropout. The

SYNC pin can also be used to synchronize the oscillator with an

external 5 V clock signal. A low-to-high transition on SYNC

initiates a new cycle. The synchronization range is 230 kHz to

350 kHz.

SHUTDOWN SD

Holding SD low puts the ADP3025 into ultralow current shut-

down mode. For automatic startup, SD can be tied to VIN via a

resistor.

SOFT START AND POWER-UP SEQUENCING (SS)

SS3 and SS5 are soft start pins for the two controllers. A 2 µA

pull-up current is used to charge an external soft start capacitor.

Power-up sequencing can easily be done by choosing different

capacitance. When SS3/SS5 < 0.6 V, the two switching regulators

are turned off. When 0.6 V < SS5/SS3 < 1.8 V, the regulators

start working in soft start mode. When SS3/SS5 > 1.8 V, the

regulators are in normal operating mode. The minimum soft

start time (~20 µs) is set by an internal capacitor. Table 4 shows

the ADP3025 operating modes.

SD

SS5

SS3

Description

Low

All Circuits Turned Off

High

SS5 < 0.6 V

SS3 < 0.6 V

5 V and 3.3 V Off; INTVCC = 5 V, REF = 800 mV

High

0.6 V < SS5 < 1.8 V

5 V in Soft Start

High

1.8 V < SS5

5 V in Normal Operation

High

0.6 V < SS3 < 1.8 V

3.3 V in Soft Start

High

1.8 V < SS3

3.3 V in Normal Operation

Rev. A | Page 11 of 24

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