D950CORE データシートの表示（PDF） - STMicroelectronics
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D950CORE Datasheet PDF : 89 Pages
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D950-Core
3 FUNCTIONAL OVERVIEW
The D950-CORE is composed of three main units.
• Data Calculation Unit (DCU)
• Address Calculation Unit (ACU)
• Program Control Unit (PCU)
These units are organized in an HARVARD architecture around three bidirectional 16-bit
buses, two for data and one for instruction. Each of these buses is dedicated to an uni-
directional 16-bit address bus (XA/YA/IA).
An 8-bit general purpose parallel port (P0-P7) can be configured (input or output). A test
condition is attached to each bit to test external events. Each of these functional blocks are
discussed in detail in Section 4“BLOCK DESCRIPTION”.
Control of the chip is performed through interface pins related to interrupt, low-power mode,
reset and miscellaneous functions.
Clock input is provided on the CLKIN pin which is buffered to the output clocks.
Figure 3.1 Block Diagram
DATA
CALCULATION
UNIT
6
16
ADDRESS
CALCULATION XA-bus
16
16
UNIT
YA-bus
16
PROGRAM
CONTROL
3
UNIT
ID-bus
16
IA-bus
16
11
8
CONTROL PO/P7
14
TEST & EMULATION
11/89
4
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